CVE-2023-31347

2024-02-1319:18:51

AMD

github.com

code bug

secure_tsc

firmware

high privilege

incorrect tsc observation

guest integrity

AI Score

6.9

Confidence

Low

SSVC

Exploitation

none

Automatable

Technical Impact

partial

JSON

Due to a code bug in
Secure_TSC, SEV firmware may allow an attacker with high privileges to cause a
guest to observe an incorrect TSC when Secure TSC is enabled potentially
resulting in a loss of guest integrity.

CNA Affected

[
  {
    "vendor": "AMD",
    "product": "3rd Gen AMD EPYC™ Processors",
    "versions": [
      {
        "status": "affected",
        "version": "various "
      }
    ],
    "platforms": [
      "x86"
    ],
    "packageName": "PI",
    "defaultStatus": "affected"
  },
  {
    "vendor": " AMD",
    "product": "4th Gen AMD EPYC™ Processors ",
    "versions": [
      {
        "status": "affected",
        "version": "various "
      }
    ],
    "platforms": [
      "x86"
    ],
    "packageName": "PI",
    "defaultStatus": "affected"
  }
]