Due to a code bug in
Secure_TSC, SEV firmware may allow an attacker with high privileges to cause a
guest to observe an incorrect TSC when Secure TSC is enabled potentially
resulting in a loss of guest integrity.
[
{
"defaultStatus": "affected",
"packageName": "PI",
"platforms": [
"x86"
],
"product": "3rd Gen AMD EPYC™ Processors",
"vendor": "AMD",
"versions": [
{
"status": "affected",
"version": "various "
}
]
},
{
"defaultStatus": "affected",
"packageName": "PI",
"platforms": [
"x86"
],
"product": "4th Gen AMD EPYC™ Processors ",
"vendor": " AMD",
"versions": [
{
"status": "affected",
"version": "various "
}
]
}
]