EUVD-2005-3105

Malware in sbrugna...

EUVD-2025-30996

Malicious code in bioql PyPI...

CVE-2025-27032

memory corruption while loading a PIL authenticated VM, when authenticated VM image is loaded without maintaining cache coherency...

CVE-2025-27032

memory corruption while loading a PIL authenticated VM, when authenticated VM image is loaded without maintaining cache coherency...

CVE-2025-27032 Improper Access Control Applied to Mirrored or Aliased Memory Regions in Hypervisor

memory corruption while loading a PIL authenticated VM, when authenticated VM image is loaded without maintaining cache coherency...

Qualcomm Chipsets 安全漏洞

Qualcomm Chipsets are a family of chipsets from Qualcomm Incorporated USA. A security vulnerability exists in Qualcomm Chipsets that stems from a failure to maintain cache coherency when loading PIL-certified VMs, which could lead to memory corruption...

PT-2025-39272

Name of the Vulnerable Software and Affected Versions versions prior to 2025-27032 Description A memory corruption issue exists when loading a Picture Interchange Language PIL authenticated Virtual Machine VM. This occurs when an authenticated VM image is loaded without maintaining cache coherenc...

DEBIAN-CVE-2025-38560

In the Linux kernel, the following vulnerability has been resolved: x86/sev: Evict cache lines during SNP memory validation An SNP cache coherency vulnerability requires a cache line eviction mitigation when validating memory after a page state change to private. The specific mitigation is to tou...

Linux kernel 安全漏洞

Linux kernel is the kernel used by Linux, the open source operating system of the Linux Foundation in the United States. A security vulnerability exists in Linux kernel that stems from a failure to clear cache lines during SNP memory validation, which could lead to a cache coherency vulnerability...

PT-2025-33759

Name of the Vulnerable Software and Affected Versions: Linux kernel affected versions not specified Description: The Linux kernel contains a cache coherency vulnerability within the x86/sev subsystem related to Secure Nested Paging SNP memory validation. The issue requires cache line eviction...

CVE-2023-53043

In the Linux kernel, the following vulnerability has been resolved: arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent If the controller is not marked as cache coherent, then kernel will try to ensure coherency during dma-ops and that may cause data corruption. So, mark the PCIe nod...

CVE-2023-53043 arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent

In the Linux kernel, the following vulnerability has been resolved: arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent If the controller is not marked as cache coherent, then kernel will try to ensure coherency during dma-ops and that may cause data corruption. So, mark the PCIe nod...

CVE-2025-22012

In the Linux kernel, the following vulnerability has been resolved: Revert "arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on appssmmu" There are reports that the pagetable walker cache coherency is not a given across the spectrum of SDM845/850 devices, leading to lock-ups and resets. It works fine o...

UBUNTU-CVE-2025-22012

In the Linux kernel, the following vulnerability has been resolved: Revert "arm64: dts: qcom: sdm845: Affirm IDR0.CCTW on appssmmu" There are reports that the pagetable walker cache coherency is not a given across the spectrum of SDM845/850 devices, leading to lock-ups and resets. It works fine o...

CVE-2025-22012

CVE-2025-22012 concerns a Linux kernel issue where a change in arm64 dts for qcom SDM845/850 could affect pagetable walker cache coherency. The vulnerability description states that this led to lock-ups and resets on some devices (e.g., Yoga C630) while others (Dragonboard 845c) were unaffected. ...

SUSE CVE-2005-3105

The mprotect code mprotect.c in Linux 2.6 on Itanium IA64 Montecito processors does not properly maintain cache coherency as required by the architecture, which allows local users to cause a denial of service and possibly corrupt data by modifying PTE protections...

CVE-2020-0550

A flaw was found in the Intel CPU's cache coherency mechanism. A microarchitectural hardware implementation issue that could allow an unprivileged local attacker to bypass conventional system security controls to infer on-CPU Level 1 cache contents is present. At this time, this specific flaw is...

security flaw

The mprotect code mprotect.c in Linux 2.6 on Itanium IA64 Montecito processors does not properly maintain cache coherency as required by the architecture, which allows local users to cause a denial of service and possibly corrupt data by modifying PTE protections...

CVE-2005-3105

The mprotect code mprotect.c in Linux 2.6 on Itanium IA64 Montecito processors does not properly maintain cache coherency as required by the architecture, which allows local users to cause a denial of service and possibly corrupt data by modifying PTE protections...

CVE-2005-3105

The mprotect code mprotect.c in Linux 2.6 on Itanium IA64 Montecito processors does not properly maintain cache coherency as required by the architecture, which allows local users to cause a denial of service and possibly corrupt data by modifying PTE protections...