RISC-V 代码问题漏洞

RISC-V is an open source instruction set architecture based on the principle of reduced instruction sets, which is easily interpreted as a type of "open source hardware" corresponding to the open source software movement. A security vulnerability exists in the RISC-V kernel that stems from a NULL...

RISC-V 资源管理错误漏洞

RISC-V is an open source instruction set architecture based on the principle of reduced instruction sets, which is easily interpreted as a type of "open source hardware" corresponding to the open source software movement. A security vulnerability exists in the RISC-V kernel, stemming from a...

RISC-V 输入验证错误漏洞

RISC-V is an open source instruction set architecture based on the principle of reduced instruction sets, which is easily interpreted as a form of "open source hardware" corresponding to the open source software movement. The RISC-V kernel suffers from an Input Validation Error vulnerability, whi...

SUSE-SU-2022:2614-1 Security update for dwarves and elfutils

This update for dwarves and elfutils fixes the following issues: elfutils was updated to version 0.177 jscSLE-24501: - elfclassify: New tool to analyze ELF objects. - readelf: Print DWATdatamemberlocation as decimal offset. Decode DWATdiscrlist block attributes. - libdw: Add DWATGNUnumerator,...

CVE-2022-34643

RISCV ISA Sim commit ac466a21df442c59962589ba296c702631e041b5 implements the incorrect exception priotrity when accessing memory...

CVA6 安全漏洞

CVA6 is an application class 6 RISC-V CPU open-sourced by the OpenHW Group in Canada. A security vulnerability exists in CVA6, which stems from an incorrect tval in ecall/ebreak...

riscv-isa-sim 安全漏洞

riscv-isa-sim is a RISC-V ISA simulator. A security vulnerability exists in riscv-isa-sim that stems from an incorrect implementation of exception prioritization when accessing memory...

CVA6 安全漏洞

CVA6 is an application class 6 RISC-V CPU open-sourced by the OpenHW Group in Canada. A security vulnerability exists in CVA6 and RISCV-Boom that stems from a PMP conflict during address translation that could result in an incorrect exception type...

GSD-2022-1002133 riscv: Increase stack size under KASAN

riscv: Increase stack size under KASAN This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.10.110 by commit...

GSD-2022-1001919 riscv: Increase stack size under KASAN

riscv: Increase stack size under KASAN This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.15.33 by commit...

GSD-2022-1001614 riscv: Increase stack size under KASAN

riscv: Increase stack size under KASAN This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.16.19 by commit...

GSD-2022-1001308 riscv: Increase stack size under KASAN

riscv: Increase stack size under KASAN This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.17.2 by commit b91e1db8a8fa56ce57410368b230527e1547439...

CVE-2022-26296

BOOM: The Berkeley Out-of-Order RISC-V Processor commit d77c2c3 was discovered to allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis...

CVE-2022-26296

CVE-2022-26296 concerns the Berkeley BOOM RISC-V core (Berkeley Out-of-Order BOOM). The root cause is commit d77c2c3 enabling a side-channel that allows a local attacker to disclose information. Impact is described as unauthorized information disclosure with local access; CVSSv3.1 base score 5.5 ...

CVE-2022-26296

BOOM: The Berkeley Out-of-Order RISC-V Processor commit d77c2c3 was discovered to allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis...

CVE-2022-26296

BOOM: The Berkeley Out-of-Order RISC-V Processor commit d77c2c3 was discovered to allow unauthorized disclosure of information to an attacker with local user access via a side-channel analysis...

GSD-2022-1000846 riscv: fix oops caused by irqsoff latency tracer

riscv: fix oops caused by irqsoff latency tracer This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.10.103 by commit...

GSD-2022-1000841 riscv: Fix config KASAN && DEBUG_VIRTUAL

riscv: Fix config KASAN && DEBUGVIRTUAL This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.10.104 by commit...

GSD-2022-1000793 riscv: fix oops caused by irqsoff latency tracer

riscv: fix oops caused by irqsoff latency tracer This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.15.26 by commit...

GSD-2022-1000784 riscv: Fix config KASAN && SPARSEMEM && !SPARSE_VMEMMAP

riscv: Fix config KASAN && SPARSEMEM && !SPARSEVMEMMAP This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.15.27 by commit...