microcode_ctl security, bug fix and enhancement update

[2:2.1-61.6.0.1]

• update 06-2d-07 to 0x71a
• update 06-55-04 to 0x2006906
• update 06-55-07 to 0x5002f01
• for Intel, do not trigger load if on-disk microcode is not an update [Orabug: 30634727]
• set early_microcode=‘no’ in virtualized guests to avoid early load bugs [Orabug: 30618736]
• do not late load prior to 3.10.0
• ensure late loading fixes are present on 4.1.12-* and 4.14.35-*
• enable early and late load for 5.4.17-*
• enable early loading for 06-4f-01
  [2:2.1-61.6]
• Avoid temporary file creation, used for here-documents in check_caveats.
  [2:2.1-61.5]
• Update Intel CPU microcode to microcode-20200602 release, addresses
  CVE-2020-0543, CVE-2020-0548, CVE-2020-0549 (#1827189):
  • Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f
    up to 0x621;
  • Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718
    up to 0x71a;
  • Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;
  • Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e
    up to 0x2f;
  • Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25
    up to 0x26;
  • Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;
  • Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21
    up to 0x22;
  • Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6
    up to 0xdc;
  • Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151
    up to 0x1000157;
  • Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode
    (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065
    up to 0x2006906;
  • Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c
    up to 0x4002f01;
  • Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c
    up to 0x5002f01;
  • Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6
    up to 0xdc;
  • Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46
    up to 0x78;
  • Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca
    up to 0xd6;
  • Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca
    up to 0xd6;
  • Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca
    up to 0xd6;
  • Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca
    up to 0xd6;
  • Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode
    from revision 0xca up to 0xd6;
  • Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision
    0xca up to 0xd6;
  • Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca
    up to 0xd6;
  • Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;
  • Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca
    up to 0xd6;
  • Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.
• Change the URL in the intel-microcode2ucode.8 to point to the GitHub
  repository since the microcode download section at Intel Download Center
  does not exist anymore.
  [2:2.1-61.4]
• Narrow down SKL-SP/W/X blacklist to exclude Server/FPGA/Fabric segment
  models.
  [2:2.1-61.3]
• Re-generate initramfs not only for the currently running kernel,
  but for several recently installed kernels as well.
  [2:2.1-61.2]
• Avoid find being SIGPIPE’d on early ‘grep -q’ exit in the dracut script.
  [2:2.1-61.1]
• Update stale posttrans dependency, add triggers for proper handling
  of the debug kernel flavour along with kernel-rt.