x86: Cross-Thread Return Address Predictions

ISSUE DESCRIPTION

It has been discovered that on some AMD CPUs, the RAS (Return Address Stack, also called RAP - Return Address Predictor - in some AMD documentation, and RSB - Return Stack Buffer - in Intel terminology) is dynamically partitioned between non-idle threads. This allows an attacker to control speculative execution on the adjacent thread.
For more details, see: <a href=“https://www.amd.com/en/corporate/product-security/bulletin/amd-sb-1045”>https://www.amd.com/en/corporate/product-security/bulletin/amd-sb-1045</a>

IMPACT

An attacker might be able to infer the contents of arbitrary host memory, including memory assigned to other guests.

VULNERABLE SYSTEMS

Only AMD CPUs are known to be potentially vulnerable. CPUs from other hardware vendors are not believed to be impacted.
Only the Zen1 and Zen2 microarchitectures are believed to be potentially vulnerable. Other microarchitectures are not believed to be vulnerable.
Only configurations with SMT activate are potentially vulnerable. If SMT is disabled by the firmware, or at runtime with smt=0 on Xen’s command line, then the platform is not vulnerable.
Xen 4.16 and later contains an optimisation, specifically:
c/s afab477fba3b (“x86/spec-ctrl: Skip RSB overwriting when safe to do so”)
which in combination with disabling 32bit PV guests (either at compile time with CONFIG_PV32=n, or at runtime with pv=no-32 on the command line) renders Xen vulnerable to attack from PV guests.
Note: multiple downstreams are known to have backported this optimisation to older versions of Xen. Consult your software vendor documentation.