inappropriate x86 IOMMU timeout detection / handling

ISSUE DESCRIPTION

IOMMUs process commands issued to them in parallel with the operation of the CPU(s) issuing such commands. In the current implementation in Xen, asynchronous notification of the completion of such commands is not used. Instead, the issuing CPU spin-waits for the completion of the most recently issued command(s). Some of these waiting loops try to apply a timeout to fail overly-slow commands. The course of action upon a perceived timeout actually being detected is inappropriate: - on Intel hardware guests which did not originally cause the timeout may be marked as crashed, - on AMD hardware higher layer callers would not be notified of the issue, making them continue as if the IOMMU operation succeeded.

IMPACT

A malicious guest may be able to elevate its privileges to that of the host, cause host or guest Denial of Service (DoS), or cause information leaks.

VULNERABLE SYSTEMS

All Xen versions from at least 3.2 onwards are vulnerable. Earlier versions have not been inspected.
Only x86 systems with in-use IOMMU hardware are vulnerable. x86 systems without any IOMMUs in use are not vulnerable. On Arm systems IOMMU / SMMU use is not security supported.
Only x86 guests which have physical devices passed through to them can leverage the vulnerability.