Stale TLB entry due to page type release race

ISSUE DESCRIPTION

x86 PV guests effect TLB flushes by way of a hypercall. Xen tries to reduce the number of TLB flushes by delaying them as much as possible. When the last type reference of a page is dropped, the need for a TLB flush (before the page is re-used) is recorded. If a guest TLB flush request involves an Inter Processor Interrupt (IPI) to a CPU in which is the process of dropping the last type reference of some page, and if that IPI arrives at exactly the right instruction boundary, a stale time stamp may be recorded, possibly resulting in the later omission of the necessary TLB flush for that page.

IMPACT

A malicious x86 PV guest may be able to access all of system memory, allowing for all of privilege escalation, host crashes, and information leaks.

VULNERABLE SYSTEMS

All Xen versions from at least 3.2 onwards are vulnerable. Earlier versions have not been checked.
Only x86 systems are affected. ARM systems are not affected.
Only x86 PV guests can leverage the vulnerability. x86 HVM guests cannot leverage the vulnerability.
RISK ASSESSMENT
A successful attack would require introducing an extended delay between two adjacent operations on one cpu – long enough for two hypercalls to complete on another cpu. The security team currently has no proof-of-concept for this vulnerability.
However, techniques for these sorts of timing-based attacks are continually advancing, so we still recommend users potentially affected by this issue apply the patch as soon as reasonably possible.