In the Linux kernel, the following vulnerability has been resolved: m68k:
mvme147,mvme16x: Don’t wipe PCC timer config bits Don’t clear the timer 1
configuration bits when clearing the interrupt flag and counter overflow.
As Michael reported, “This results in no timer interrupts being delivered
after the first. Initialization then hangs in calibrate_delay as the
jiffies counter is not updated.” On mvme16x, enable the timer after
requesting the irq, consistent with mvme147.
OS | Version | Architecture | Package | Version | Filename |
---|---|---|---|---|---|
ubuntu | 20.04 | noarch | linux | < any | UNKNOWN |
ubuntu | 20.04 | noarch | linux-aws | < any | UNKNOWN |
ubuntu | 18.04 | noarch | linux-aws-5.4 | < any | UNKNOWN |
ubuntu | 20.04 | noarch | linux-azure | < any | UNKNOWN |
ubuntu | 18.04 | noarch | linux-azure-5.4 | < any | UNKNOWN |
ubuntu | 20.04 | noarch | linux-bluefield | < any | UNKNOWN |
ubuntu | 20.04 | noarch | linux-gcp | < any | UNKNOWN |
ubuntu | 18.04 | noarch | linux-gcp-5.4 | < any | UNKNOWN |
ubuntu | 20.04 | noarch | linux-gkeop | < any | UNKNOWN |
ubuntu | 18.04 | noarch | linux-hwe-5.4 | < any | UNKNOWN |