Lucene search
+L

1 matches found

OSV
OSV
added 2024/09/25 11:15 a.m.4 views

ALPINE-CVE-2024-45817

In x86's APIC Advanced Programmable Interrupt Controller architecture, error conditions are reported in a status register. Furthermore, the OS can opt to receive an interrupt when a new error occurs. It is possible to configure the error interrupt with an illegal vector, which generates an error...

7.3CVSS6.5AI score0.00544EPSS
SaveExploits0References1
Rows per page
Query Builder