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Kitploit
Kitploit
added 2026/09/02 8:40 a.m.3 views

mojo-v

Mojo-V: Secret Computation for RISC-V Mojo-V pronounced “mojo-five” is a new RISC-V extension that introduces privacy-oriented programming capabilities for RISC-V. Mojo-V implements secret computation, enabling secure, efficient, and data-oblivious execution without reliance on fragile software a...

6AI score
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Kitploit
Kitploit
added 2026/09/02 7:24 a.m.3 views

ckb-vm

Nervos CKB VM About CKB VM CKB VM is a pure software implementation of the RISC-V instruction set used as scripting VM in CKB. Right now it implements full IMCB instructions for both 32-bit and 64-bit register size support. In the future we might also implement V extensions to enable better crypt...

5.9AI score
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Kitploit
Kitploit
added 2026/09/02 5:51 a.m.2 views

riscv-isa-sim

Spike RISC-V ISA Simulator About Spike, the RISC-V ISA Simulator, implements a functional model of one or more RISC-V harts. It is named after the golden spike used to celebrate the completion of the US transcontinental railway. Spike supports the following RISC-V ISA features: RV32I and RV64I ba...

6.3AI score
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Kitploit
Kitploit
added 2026/09/02 4:27 a.m.3 views

DeadDialect

DeadDialect Every boot speaks a different language. Yesterday's binary is today's dead code. A session-unique RISC-V ISA remapping system. Every time the system boots, it generates a fresh cryptographic permutation of the instruction set. Binaries compiled for one session are cryptographically...

5.9AI score
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Kitploit
Kitploit
added 2026/09/02 3:22 a.m.4 views

arduino-pico

Arduino-Pico Raspberry Pi Pico Arduino core, for all RP2040 and RP2350 boards This is a port of Arduino to the RP2040 Raspberry Pi Pico processor and RP2350 Raspberry Pi Pico 2 processor. It uses the bare Raspberry Pi Pico SDK and a custom GCC 14.3/Newlib 4.5 toolchain and supports ARM and RISC-V...

5.9AI score
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Kitploit
Kitploit
added 2026/09/02 1:16 a.m.3 views

qrv

QRV — a QNX Neutrino-based operating system, re-imagined for 64-bit RISC-V QRV is a ground-up adaptation and re-implementation of the QNX Neutrino 6.4 operating system for modern 64-bit hardware, with RISC-V rv64g as the primary architecture and x86-64 as a secondary target. The project started o...

5.9AI score
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Kitploit
Kitploit
added 2026/09/01 11:33 p.m.3 views

boxlambda

Acerca de BoxLambda BoxLambda es un proyecto híbrido hardware-software que crea un microordenador casero de estilo retro basado en FPGA. El objetivo es crear un entorno de espacio aislado para experimentar con software y gateware FPGA. Configuración Física La configuración física. Características...

5.9AI score
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Kitploit
Kitploit
added 2026/09/01 11:19 p.m.4 views

pico2-swd-riscv

pico2-swd-riscv SWD debug probe for RP2350 RISC-V Hazard3 cores. One Pico2 debugs another via two GPIO wires. 0. VIBE CODE WARNING WRITTEN BY HUMAN About 80% of the code is vibe coded; The readme is almost completely generated except the whole vibe-code-warning section. I spent many nights with...

5.7AI score
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Kitploit
Kitploit
added 2026/09/01 11:08 p.m.4 views

vpod

Vpod Live demo • Getting Started • Documentation • Issues • Contributing What is a vpod ? A vpod is a lightweight, portable sandbox that gives an untrusted process an instant Linux environment. It uses a RISC‑V architecture and runs entirely inside WebAssembly. Fast startup : Boot in under a...

6AI score
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Kitploit
Kitploit
added 2026/09/01 9:38 p.m.5 views

mojo-v

Mojo-V: Computación Secreta para RISC-V Mojo-V pronunciado “mojo-five” es una nueva extensión de RISC-V que introduce capacidades de programación orientadas a la privacidad para RISC-V. Mojo-V implementa computación secreta, lo que permite una ejecución segura, eficiente y oblivious a los datos s...

5.9AI score
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Kitploit
Kitploit
added 2026/09/01 4:45 p.m.5 views

riscv-isa-sim

Spike RISC-V ISA Simulator Acerca de Spike, el simulador de ISA RISC-V, implementa un modelo funcional de uno o más harts RISC-V. Recibe su nombre del clavo de oro golden spike utilizado para celebrar la finalización del ferrocarril transcontinental de EE. UU. Spike soporta las siguientes...

5.9AI score
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RedhatCVE
RedhatCVE
added 2026/09/01 7:05 a.m.5 views

CVE-2026-80688

A flaw was found in the Linux kernel, specifically within the RISC-V architecture's veccheckunalignedaccessspeedallcpus function. This function, intended for initialization, could continue running as a kernel thread after its allocated memory is released. If this occurs, the system attempts to...

5.5CVSS5.9AI score0.00166EPSS
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RedhatCVE
RedhatCVE
added 2026/08/31 8:47 a.m.6 views

CVE-2026-80682

A flaw was found in the Linux kernel's RISC-V memory management component. An incorrect calculation for memory alignment during system initialization could lead to a kernel warning. This issue arises when the physical memory base address is not properly aligned, potentially causing system...

7.8CVSS5.9AI score0.00134EPSS
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Tenable Nessus
Tenable Nessus
added 2026/08/31 12:00 a.m.6 views

Linux Distros Unpatched Vulnerability : CVE-2026-80682

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - In the Linux kernel, the following vulnerability has been resolved: riscv/mm: use physical alignment for vmemmapstartpfn RISC-V computes vmemmapstartpfn by...

7.8CVSS5.8AI score0.00134EPSS
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Tenable Nessus
Tenable Nessus
added 2026/08/31 12:00 a.m.4 views

Linux Distros Unpatched Vulnerability : CVE-2026-80688

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - riscv: drop init from veccheckunalignedaccessspeedallcpus This function runs within a kthread and need not necessarily finish before system finishes boot and...

5.9AI score0.00166EPSS
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OSV
OSV
added 2026/08/31 12:00 a.m.6 views

UBUNTU-CVE-2026-80688

In the Linux kernel, the following vulnerability has been resolved: riscv: drop init from veccheckunalignedaccessspeedallcpus This function runs within a kthread and need not necessarily finish before system finishes boot and freeinitmem unmaps the .init.text section. This function makes calls to...

5.8AI score0.00166EPSS
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OSV
OSV
added 2026/08/31 12:00 a.m.8 views

UBUNTU-CVE-2026-80682

In the Linux kernel, the following vulnerability has been resolved: riscv/mm: use physical alignment for vmemmapstartpfn RISC-V computes vmemmapstartpfn by rounding physrambase down to VMEMMAPADDRALIGN. That alignment must therefore be expressed in the physical-address domain. Commit 476849b0fba4...

7.8CVSS5.8AI score0.00134EPSS
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Kitploit
Kitploit
added 2026/08/30 5:27 p.m.4 views

sfuzz

SFUZZ Start date: Dec, 2021 This is a coverage-guided, emulation based greybox fuzzer that makes use of a custom Just-In-Time compiler to achieve near-native performance. It works by lifting RISC-V elf binaries to an intermediate representation before JIT compiling them to x86 during execution...

6.1AI score
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Kitploit
Kitploit
added 2026/08/29 2:01 a.m.4 views

GoTEE

Introduzione Il framework GoTEE implementa l'istanziazione concorrente di unikernel basati su TamaGo in modalità privilegiata e non privilegiata, che interagiscono tra loro tramite la modalità monitor e chiamate di sistema personalizzate. Con queste capacità, GoTEE implementa ambienti di esecuzio...

5.9AI score
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NVD
NVD
added 2026/08/28 8:16 a.m.12 views

CVE-2026-80688

In the Linux kernel, the following vulnerability has been resolved: riscv: drop init from veccheckunalignedaccessspeedallcpus This function runs within a kthread and need not necessarily finish before system finishes boot and freeinitmem unmaps the .init.text section. This function makes calls to...

0.00166EPSS
SaveExploits0References3
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