CVE-2024-26902

In the Linux kernel, the following vulnerability has been resolved: perf: RISCV: Fix panic on pmu overflow handler 1 idx of int is not desired when setting bits in unsigned long overflowedctrs, use BIT instead. This panic happens when running 'perf record -e branches' on sophgo sg2042. 273.311852...

CVE-2024-26902

In the Linux kernel, the following vulnerability has been resolved: perf: RISCV: Fix panic on pmu overflow handler 1 idx of int is not desired when setting bits in unsigned long overflowedctrs, use BIT instead. This panic happens when running 'perf record -e branches' on sophgo sg2042. 273.311852...

CVE-2024-26902 perf: RISCV: Fix panic on pmu overflow handler

In the Linux kernel, the following vulnerability has been resolved: perf: RISCV: Fix panic on pmu overflow handler 1 idx of int is not desired when setting bits in unsigned long overflowedctrs, use BIT instead. This panic happens when running 'perf record -e branches' on sophgo sg2042. 273.311852...

CVE-2024-26902 perf: RISCV: Fix panic on pmu overflow handler

In the Linux kernel, the following vulnerability has been resolved: perf: RISCV: Fix panic on pmu overflow handler 1 idx of int is not desired when setting bits in unsigned long overflowedctrs, use BIT instead. This panic happens when running 'perf record -e branches' on sophgo sg2042. 273.311852...

CVE-2024-26902

CVE-2024-26902 concerns the Linux kernel: a RISCV perf PMU overflow panic when setting bits for overflowed_ctrs due to using (1 <