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SUSE CVE
SUSE CVE
added last week6 views

SUSE CVE-2026-45862

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush cache for PASID table before using it When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before i...

5.7AI score0.00013EPSS
Exploits0References3
SUSE CVE
SUSE CVE
added last week3 views

SUSE CVE-2026-45894

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

5.7AI score0.00013EPSS
Exploits0References3
SUSE CVE
SUSE CVE
added last week4 views

SUSE CVE-2026-45945

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits 64 bytes. When replacing an active PASID entry e.g., during domain replacement, the current implementation calculates a ne...

5.8AI score0.00015EPSS
Exploits0References3
RedhatCVE
RedhatCVE
added last week3 views

CVE-2026-45894

A flaw was found in the Linux kernel's Intel VT-d Virtualization Technology for Directed I/O Scalable Mode. When a Process Address Space ID PASID table entry is being removed, the system may attempt to clear the entry before properly signaling to the hardware that the entry is no longer active...

7.8CVSS5.8AI score0.00013EPSS
Exploits0References4
Tenable Nessus
Tenable Nessus
added 2026/05/28 12:0 a.m.7 views

Linux Distros Unpatched Vulnerability : CVE-2026-45945

"The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table...

8.8CVSS5.7AI score0.00015EPSS
Exploits0References2
EUVD
EUVD
added 2026/05/27 3:33 p.m.4 views

EUVD-2026-32229

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits 64 bytes. When replacing an active PASID entry e.g., during domain replacement, the current implementation calculates a ne...

5.8AI score0.00015EPSS
Exploits0References3
EUVD
EUVD
added 2026/05/27 3:33 p.m.3 views

EUVD-2026-32360

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

5.7AI score0.00013EPSS
Exploits0References5
EUVD
EUVD
added 2026/05/27 3:33 p.m.4 views

EUVD-2026-32328

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush cache for PASID table before using it When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before i...

5.7AI score0.00013EPSS
Exploits0References9
NVD
NVD
added 2026/05/27 2:17 p.m.4 views

CVE-2026-45945

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits 64 bytes. When replacing an active PASID entry e.g., during domain replacement, the current implementation calculates a ne...

8.8CVSS0.00015EPSS
Exploits0References2
NVD
NVD
added 2026/05/27 2:17 p.m.5 views

CVE-2026-45894

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

7.8CVSS0.00013EPSS
Exploits0References4
OSV
OSV
added 2026/05/27 2:17 p.m.1 views

UBUNTU-CVE-2026-45894

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

7.8CVSS5.7AI score0.00013EPSS
Exploits0References3
NVD
NVD
added 2026/05/27 2:16 p.m.2 views

CVE-2026-45862

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush cache for PASID table before using it When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before i...

7.8CVSS0.00013EPSS
Exploits0References8
OSV
OSV
added 2026/05/27 2:16 p.m.2 views

UBUNTU-CVE-2026-45862

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush cache for PASID table before using it When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before i...

7.8CVSS5.7AI score0.00013EPSS
Exploits0References3
Cvelist
Cvelist
added 2026/05/27 12:18 p.m.31 views

CVE-2026-45945 iommu/vt-d: Fix race condition during PASID entry replacement

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits 64 bytes. When replacing an active PASID entry e.g., during domain replacement, the current implementation calculates a ne...

8.8CVSS0.00015EPSS
Exploits0References2
Debian CVE
Debian CVE
added 2026/05/27 12:18 p.m.6 views

CVE-2026-45945

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Fix race condition during PASID entry replacement The Intel VT-d PASID table entry is 512 bits 64 bytes. When replacing an active PASID entry e.g., during domain replacement, the current implementation calculates a ne...

8.8CVSS5.7AI score0.00015EPSS
Exploits0
CVE
CVE
added 2026/05/27 12:17 p.m.9 views

CVE-2026-45894

The CVE-2026-45894 issue affects the Linux kernel IOMMU VT-d Scalable Mode PASID handling. When a PASID table entry is torn down, the current code zeros the full 64-byte structure while P=1, risking a torn read if hardware fetches the 64 bytes concurrently. Mitigation directs an ownership handsha...

7.8CVSS5.7AI score0.00013EPSS
Exploits0References4
Cvelist
Cvelist
added 2026/05/27 12:17 p.m.29 views

CVE-2026-45894 iommu/vt-d: Clear Present bit before tearing down PASID entry

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

7.8CVSS0.00013EPSS
Exploits0References4
CVE
CVE
added 2026/05/27 12:15 p.m.7 views

CVE-2026-45862

The CVE-2026-45862 issue concerns the Linux kernel’s IOMMU VT-d PASID handling. A flaw in the cache flush order when writing a freshly allocated zero-initialized PASID table to a PASID directory entry creates a time window during which non-coherent IOMMU hardware could access RAM contents that ar...

7.8CVSS5.7AI score0.00013EPSS
Exploits0References8
Cvelist
Cvelist
added 2026/05/27 12:15 p.m.30 views

CVE-2026-45862 iommu/vt-d: Flush cache for PASID table before using it

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush cache for PASID table before using it When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before i...

7.8CVSS0.00013EPSS
Exploits0References8
UbuntuCve
UbuntuCve
added 2026/05/27 12:0 a.m.6 views

CVE-2026-45945

iommu/vt-d: Fix race condition during PASID entry replacement...

8.8CVSS5.8AI score0.00015EPSS
Exploits0References2
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