MARVEL: Multi-Agent RTL Vulnerability Extraction Using Large Language Models

Hardware security verification is a challenging and time-consuming task. For this purpose, design engineers may utilize tools such as formal verification, linters, and functional simulation tests, coupled with analysis and a deep understanding of the hardware design being inspected. Large Languag...

Area Comparison of CHERIoT and PMP in Ibex

Memory safety is a critical concern for modern embedded systems, particularly in security-sensitive applications. This paper explores the area impact of adding memory safety extensions to the Ibex RISC-V core, focusing on physical memory protection PMP and Capability Hardware Extension to RISC-V...