Astra Linux – Vulnerability in Intel Microcode

In some IntelR processors, the incorrect order of behavior during the transition between the executive monitor and the SMI transfer monitor STM may allow a privileged user to potentially enable privilege escalation through local access...

OESA-2024-2140 microcode_ctl security update

This is a tool to transform and deploy microcode update for x86 CPUs. Security Fixes: Improper isolation in the IntelR CoreTM Ultra Processor stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access.CVE-2023-42667 Improper isolation in...

SUSE CVE-2024-24853

Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...

PT-2024-9889

Name of the Vulnerable Software and Affected Versions: Intel Processor affected versions not specified Description: The issue is related to an incorrect behavior order in the transition between the executive monitor and the SMI transfer monitor STM in some Intel processors. This may allow a...