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osv_alpine
osv_alpine
•added 2026/05/12 5:16 p.m.•44 views

ALPINE-CVE-2025-35979

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Processors within VMX non-root guest operation may allow an information disclosure. Unprivileged software adversary with an authenticated user combined with a...

6.8CVSS5.7AI score0.00096EPSS
SaveExploits0References1
RedHat Linux
RedHat Linux
•added 2025/07/01 7:48 p.m.•18 views

microcode_ctl: Exposure of sensitive information

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.8AI score0.00266EPSS
SaveExploits0References6
RedHat Linux
RedHat Linux
•added 2025/07/01 4:55 p.m.•20 views

microcode_ctl: Exposure of sensitive information

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Core™ processors 10th Generation may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.7AI score0.00204EPSS
SaveExploits0References5
RedHat Linux
RedHat Linux
•added 2025/07/01 3:39 p.m.•18 views

microcode_ctl: Exposure of sensitive information

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Core™ processors 10th Generation may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.7AI score0.00204EPSS
SaveExploits0References5
RedHat Linux
RedHat Linux
•added 2025/07/01 2:55 p.m.•23 views

microcode_ctl: Exposure of sensitive information

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Core™ processors 10th Generation may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.7AI score0.00204EPSS
SaveExploits0References5
osv_ubuntu
osv_ubuntu
•added 2025/05/13 9:16 p.m.•14 views

UBUNTU-CVE-2024-43420

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel AtomR processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.5AI score0.00202EPSS
SaveExploits0References6
Rapid7 Vulnerability Database (full)
Rapid7 Vulnerability Database (full)
•added 2025/05/13 12:00 a.m.•5 views

CVE-2024-43420: Exposure of Sensitive Information caused by Shared Microarchitectural Predictor State that Influences Transient Execution

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some Intel AtomR processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.6AI score0.00202EPSS
SaveExploits0References1
CNNVD
CNNVD
•added 2025/05/13 12:00 a.m.•11 views

Intel Atom Processor security vulnerabilities

Intel Atom Processors is Intel's family of low-power processors for edge computing and networking applications, designed for devices that focus on battery life and compact size rather than raw processing performance. Intel Atom Processors suffers from an information disclosure vulnerability that...

5.7CVSS6.5AI score0.00202EPSS
SaveExploits0References2
Rapid7 Vulnerability Database (full)
Rapid7 Vulnerability Database (full)
•added 2025/01/22 12:00 a.m.•6 views

CVE-2024-10929: Exposure of Sensitive Information caused by Shared Microarchitectural Predictor State that Influences Transient Execution

In certain circumstances, an issue in Arm Cortex-A57, Cortex-A72 revisions before r1p0, Cortex-A73 and Cortex-A75 may allow an adversary to gain a weak form of control over the victim's branch history...

5.1CVSS6AI score0.00168EPSS
SaveExploits0References1
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