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Vulnrichment
Vulnrichment
added 2026/06/19 9:23 a.m.12 views

CVE-2026-34192 GPU DDK - _MMU_AllocLevel error recovery paths leave dangling page table entries

Software installed and run as a non-privileged user may conduct improper GPU system calls to cause an error path leading to UAF of GPU page tables. The vulnerability allows physical memory allocated for MMU page tables to be used after being freed. This was caused by an error path that would not...

5.8AI score0.00162EPSS
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RedHat Linux
RedHat Linux
added 2026/06/17 6:53 a.m.36 views

kernel: iommu: disable SVA when CONFIG_X86 is set

A security vulnerability was found in the Linux kernel's IOMMU Shared Virtual Addressing SVA implementation on x86 architecture. When SVA is enabled, the IOMMU caches kernel page table entries. Since the kernel lacks a mechanism to notify the IOMMU when kernel page table pages are freed and...

7.8CVSS5.7AI score0.00165EPSS
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Cvelist
Cvelist
added 2026/06/16 5:19 a.m.58 views

CVE-2026-10635 Dangling memory-domain pointer (use-after-free) in Xtensa MMU page-table code on memory-domain de-init

On Xtensa targets with CONFIGUSERSPACE and CONFIGXTENSAMMU, the page-table code arch/xtensa/core/ptables.c maintains a global list, xtensadomainlist, of active memory domains using a list node embedded inside the caller-owned struct kmemdomain. When a domain is destroyed via kmemdomaindeinit -...

6.3CVSS0.00164EPSS
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CVE
CVE
added 2026/06/16 5:19 a.m.79 views

CVE-2026-10635

CVE-2026-10635 affects Zephyr v4.4.0 on Xtensa targets with CONFIG_USERSPACE and CONFIG_XTENSA_MMU. The bug arises when destroying a memory domain via k_mem_domain_deinit(): the page-table code keeps a global xtensa_domain_list entry for the domain, but the node is not removed, leaving a dangling...

6.3CVSS6.1AI score0.00164EPSS
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Positive Technologies
Positive Technologies
added 2026/06/16 12:00 a.m.38 views

PT-2026-49610

On Xtensa targets with CONFIG USERSPACE and CONFIG XTENSA MMU, the page-table code arch/xtensa/core/ptables.c maintains a global list, xtensa domain list, of active memory domains using a list node embedded inside the caller-owned struct k mem domain. When a domain is destroyed via k mem domain...

6.3CVSS5.5AI score0.00164EPSS
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RedHat Linux
RedHat Linux
added 2026/06/12 7:56 p.m.17 views

kernel: iommu: disable SVA when CONFIG_X86 is set

A security vulnerability was found in the Linux kernel's IOMMU Shared Virtual Addressing SVA implementation on x86 architecture. When SVA is enabled, the IOMMU caches kernel page table entries. Since the kernel lacks a mechanism to notify the IOMMU when kernel page table pages are freed and...

7.8CVSS5.4AI score0.00165EPSS
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Vulnrichment
Vulnrichment
added 2026/06/10 12:33 a.m.15 views

CVE-2026-45328 ESF-IDF: Out-of-Bounds Write in ESP-TEE Secure Service Wrappers

ESF-IDF is the Espressif Internet of Things IOT Development Framework. In versions 5.5.4 and 6.0, the esptee component exposes secure-service wrappers in espsecureservices.c and espsecureservicesiram.c that bridge calls from the user application i.e. the REE to TEE-protected hardware peripherals...

9.3CVSS5.3AI score0.00126EPSS
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OSV
OSV
added 2026/06/10 12:33 a.m.16 views

CVE-2026-45328 ESF-IDF: Out-of-Bounds Write in ESP-TEE Secure Service Wrappers

ESF-IDF is the Espressif Internet of Things IOT Development Framework. In versions 5.5.4 and 6.0, the esptee component exposes secure-service wrappers in espsecureservices.c and espsecureservicesiram.c that bridge calls from the user application i.e. the REE to TEE-protected hardware peripherals...

9.3CVSS5.9AI score
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NVD
NVD
added 2026/06/09 6:16 p.m.23 views

CVE-2025-54509

Improper access control for register interface in the Input-Output Memory Management Unit IOMMU could allow a privileged attacker to cause non-coherent accesses by the AMD Secure Processor ASP, potentially resulting in loss of integrity...

4CVSS0.00128EPSS
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Vulnrichment
Vulnrichment
added 2026/06/09 5:22 p.m.19 views

CVE-2025-54509

Improper access control for register interface in the Input-Output Memory Management Unit IOMMU could allow a privileged attacker to cause non-coherent accesses by the AMD Secure Processor ASP, potentially resulting in loss of integrity...

4CVSS5.2AI score0.00128EPSS
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ATTACKERKB
ATTACKERKB
added 2026/06/09 5:22 p.m.6 views

CVE-2025-54509

Improper access control for register interface in the Input-Output Memory Management Unit IOMMU could allow a privileged attacker to cause non-coherent accesses by the AMD Secure Processor ASP, potentially resulting in loss of integrity...

4CVSS5.2AI score0.00128EPSS
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Debian CVE
Debian CVE
added 2026/06/09 11:52 a.m.26 views

CVE-2026-46317

In the Linux kernel, the following vulnerability has been resolved: KVM: arm64: Reassign nestedmmus array behind mmulock kvm-arch.nestedmmus is walked under kvm-mmulock, including from the MMU notifier path kvmunmapgfnrange - kvmnesteds2unmap, which can run at any time. kvmvcpuinitnested...

8.8CVSS5.5AI score0.00125EPSS
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Positive Technologies
Positive Technologies
added 2026/06/09 12:00 a.m.26 views

PT-2026-48127

Name of the Vulnerable Software and Affected Versions AMD Secure Processor affected versions not specified Description Improper access control for the register interface in the Input-Output Memory Management Unit IOMMU allows a privileged attacker, such as a malicious hypervisor, to cause...

4CVSS5.8AI score0.00128EPSS
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CNNVD
CNNVD
added 2026/06/09 12:00 a.m.25 views

AMD secure processor 安全漏洞

The AMD Secure Processor ASP is an independent ARM Coretex-A5 chip developed by American semiconductor company AMD. The AMD Secure Processor has a security vulnerability, which stems from improper access control of the input/output memory management unit’s register interfaces. This vulnerability...

4CVSS5.3AI score0.00128EPSS
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Amd
Amd
added 2026/06/09 12:00 a.m.32 views

ASP non-Coherent Memory Access

CVE Details Refer to Glossary for explanation of terms CVE| CVE Description| CVSS Score ---|---|--- CVE-2025-54509| Improper access control for register interface in the input-output memory management unit IOMMU could allow a privileged attacker to cause non-coherent accesses by the AMD Secure...

4CVSS5.4AI score0.00128EPSS
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RedHat Linux
RedHat Linux
added 2026/05/28 2:41 a.m.25 views

kernel: iommu: disable SVA when CONFIG_X86 is set

A security vulnerability was found in the Linux kernel's IOMMU Shared Virtual Addressing SVA implementation on x86 architecture. When SVA is enabled, the IOMMU caches kernel page table entries. Since the kernel lacks a mechanism to notify the IOMMU when kernel page table pages are freed and...

7.8CVSS6.2AI score0.00165EPSS
SaveExploits0References5
RedhatCVE
RedhatCVE
added 2026/05/28 12:07 a.m.23 views

CVE-2026-45944

A flaw was found in the Linux kernel's IOMMU Input/Output Memory Management Unit VT-d Virtualization Technology for Directed I/O component. When a context entry is being torn down, the 'Present' bit might not be cleared before other parts of the entry are zeroed. This can lead to the hardware...

7.5CVSS5.8AI score0.00127EPSS
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Positive Technologies
Positive Technologies
added 2026/05/28 12:00 a.m.46 views

PT-2026-44236

Name of the Vulnerable Software and Affected Versions Linux kernel affected versions not specified Description A use-after-free issue exists in the KVM x86 shadow paging mechanism. The shadow MMU calculates Guest Frame Numbers GFNs for direct shadow pages by adding the SPTE index to sp-gfn. This...

9.8CVSS5.9AI score0.00154EPSS
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EUVD
EUVD
added 2026/05/27 3:33 p.m.17 views

EUVD-2026-32328

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Flush cache for PASID table before using it When writing the address of a freshly allocated zero-initialized PASID table to a PASID directory entry, do that after the CPU cache flush for this PASID table, not before i...

5.7AI score0.0015EPSS
SaveExploits0References9
OSV
OSV
added 2026/05/27 2:17 p.m.29 views

UBUNTU-CVE-2026-45944

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down context entry When tearing down a context entry, the current implementation zeros the entire 128-bit entry using multiple 64-bit writes. This creates a window where the hardware c...

7.5CVSS5.7AI score0.00127EPSS
SaveExploits0References4
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