FreeBSD Security Advisory - FreeBSD-SA-26:31.arm64

FreeBSD Security Advisory - Some Arm CPUs have errata where the ordering of stores and the TLBI+DSB sequence may be incorrect. If one CPU stores to a virtual address while another CPU invalidates the translation for that address, the second CPU's TLBI+DSB may complete before the first CPU's store...

SUSE CVE-2026-45894

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

EUVD-2026-32360

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

CVE-2026-45894

The CVE-2026-45894 issue affects the Linux kernel IOMMU VT-d Scalable Mode PASID handling. When a PASID table entry is torn down, the current code zeros the full 64-byte structure while P=1, risking a torn read if hardware fetches the 64 bytes concurrently. Mitigation directs an ownership handsha...

CVE-2026-45894 iommu/vt-d: Clear Present bit before tearing down PASID entry

In the Linux kernel, the following vulnerability has been resolved: iommu/vt-d: Clear Present bit before tearing down PASID entry The Intel VT-d Scalable Mode PASID table entry consists of 512 bits 64 bytes. When tearing down an entry, the current implementation zeros the entire 64-byte structure...

PT-2026-43761

Name of the Vulnerable Software and Affected Versions Linux kernel affected versions not specified Description An issue exists in the Intel VT-d Scalable Mode PASID table entry handling. The current implementation zeros the entire 64-byte structure immediately using multiple 64-bit writes when...