7 matches found
CVE-2023-20510
An insufficient DRAM address validation in PMFW may allow a privileged attacker to read from an invalid DRAM address to SRAM, potentially resulting in data corruption or denial of service...
CVE-2023-20510
An insufficient DRAM address validation in PMFW may allow a privileged attacker to read from an invalid DRAM address to SRAM, potentially resulting in data corruption or denial of service...
CVE-2023-20533
CVE-2023-20533 is documented in multiple trusted sources as a vulnerability in the AMD SMU/ASP ecosystem: it describes insufficient DRAM address validation in the System Management Unit (SMU), which may allow a DMA attacker to read/write invalid DRAM addresses and could lead to denial of service....
CVE-2021-46774
CVE-2021-46774 describes insufficient input validation in the AMD ABL, enabling a privileged attacker to perform arbitrary DRAM writes and potentially execute code or escalate privileges. Connected advisories confirm this vulnerability is among issues addressed by AMD/PI firmware updates and kern...
CVE-2021-26351
CVE-2021-26351 corresponds to an insufficient DRAM address validation vulnerability in the AMD System Management Unit (SMU), which may allow a DMA read/write to an invalid DRAM address and cause a denial of service. Connected AMD advisories (AMD-SB-1027) map this issue to AMD platforms across des...
CVE-2021-26351
Insufficient DRAM address validation in System Management Unit SMU may result in a DMA Direct Memory Access read/write from/to invalid DRAM address that could result in denial of service...
CVE-2021-26337
The CVE-2021-26337 issue is an AMD SMU (System Management Unit) DRAM address validation flaw. It can permit a DMA read from an invalid DRAM address into SRAM, causing the SMU to stop servicing further requests. Mitigations are provided by AMD/AGSIA: update to the specified AGESA PI software versi...