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OSV
OSV
•added 2026/07/28 1:19 p.m.•10 views

ALPINE-CVE-2026-62430

Accesses to the CMOS memory contents are done using an indirect IO port pair. Therefore Xen needs to cache the guest chosen index, and one of the usages of the index didn't take the necessary locking to avoid concurrent changes. As a result, a guest could change the index after it being checked,...

7.5CVSS5.3AI score0.0038EPSS
SaveExploits0References1
NVD
NVD
•added 2026/07/28 1:19 p.m.•13 views

CVE-2026-62430

Accesses to the CMOS memory contents are done using an indirect IO port pair. Therefore Xen needs to cache the guest chosen index, and one of the usages of the index didn't take the necessary locking to avoid concurrent changes. As a result, a guest could change the index after it being checked,...

7.5CVSS0.0038EPSS
SaveExploits0References3
attackerkb
attackerkb
•added 2026/07/28 12:32 p.m.•16 views

CVE-2026-62430

Accesses to the CMOS memory contents are done using an indirect IO port pair. Therefore Xen needs to cache the guest chosen index, and one of the usages of the index didn't take the necessary locking to avoid concurrent changes. As a result, a guest could change the index after it being checked,...

5.9AI score0.0038EPSS
SaveExploits0References2
Cvelist
Cvelist
•added 2026/07/28 12:32 p.m.•41 views

CVE-2026-62430 x86: Out-of-bounds read in vRTC emulation

Accesses to the CMOS memory contents are done using an indirect IO port pair. Therefore Xen needs to cache the guest chosen index, and one of the usages of the index didn't take the necessary locking to avoid concurrent changes. As a result, a guest could change the index after it being checked,...

0.0038EPSS
SaveExploits0References1
Rapid7 Vulnerability Database (full)
Rapid7 Vulnerability Database (full)
•added 2026/07/28 12:00 a.m.•2 views

CVE-2026-62430: Concurrent Execution using Shared Resource with Improper Synchronization

Accesses to the CMOS memory contents are done using an indirect IO port pair. Therefore Xen needs to cache the guest chosen index, and one of the usages of the index didn't take the necessary locking to avoid concurrent changes. As a result, a guest could change the index after it being checked,...

7.5CVSS5.9AI score0.0038EPSS
SaveExploits0References2
Positive Technologies
Positive Technologies
•added 2026/07/28 12:00 a.m.•24 views

PT-2026-65472

Accesses to the CMOS memory contents are done using an indirect IO port pair. Therefore Xen needs to cache the guest chosen index, and one of the usages of the index didn't take the necessary locking to avoid concurrent changes. As a result, a guest could change the index after it being checked,...

7.5CVSS5.9AI score0.0038EPSS
SaveExploits0References35
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