Siemens SCALANCE and RUGGEDCOM Devices Improper Input Validation (CVE-2024-50181)

clk: imx: Remove CLKSETPARENTGATE for DRAM mux for i.MX7D. For i.MX7D DRAM related mux clock, the clock source change should ONLY be done done in low level asm code without accessing DRAM, and then calling clk API to sync the HW clock status with clk tree, it should never touch real clock source...

clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D

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