29 matches found
LLMs for Secure Hardware Design and Related Problems: Opportunities and Challenges
The integration of Large Language Models LLMs into Electronic Design Automation EDA and hardware security is rapidly reshaping the semiconductor industry. While LLMs offer unprecedented capabilities in generating Register Transfer Level RTL code, automating testbenches, and bridging the semantic...
EUVD-2017-4611
Malware in sbrugna...
EUVD-2017-4610
Malware in sbrugna...
EUVD-2017-4613
Malware in sbrugna...
Bridging the Gap between Hardware Fuzzing and Industrial Verification
As hardware design complexity increases, hardware fuzzing emerges as a promising tool for automating the verification process. However, a significant gap still exists before it can be applied in industry. This paper aims to summarize the current progress of hardware fuzzing from an industry-use...
USN-7466-1: KiCad vulnerabilities
It was discovered that KiCad incorrectly handled memory when opening malicious files. An attacker could possibly use this issue to cause a denial of service or execute arbitrary commands...
Taquito 安全漏洞
Taquito is ECAD open source a fast and lightweight TypeScript library . Taquito suffers from a command execution vulnerability that stems from not properly executing regular expression matches for authorized commands and parameters, which can be exploited by an attacker to execute unauthorized...
austinelectronicdesign.com Improper Access Control vulnerability OBB-3793522
Following the coordinated and responsible vulnerability disclosure guidelines of the ISO 29147 standard, Open Bug Bounty has: a. verified the vulnerability and confirmed its existence; b. notified the website operator about its existence. Technical details of the vulnerability are currently hidde...
[SECURITY] Fedora 35 Update: kicad-6.0.2-1.fc35
KiCad is EDA software to design electronic schematic diagrams and printed circuit board artwork of up to 32 layers...
DEBIAN-CVE-2022-23946
A stack-based buffer overflow vulnerability exists in the Gerber Viewer gerber and excellon GCodeNumber parsing functionality of KiCad EDA 6.0.1 and master commit de006fc010. A specially-crafted gerber or excellon file can lead to code execution. An attacker can provide a malicious file to trigge...
CVE-2017-13092
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including improperly specified HDL syntax allows use of an EDA tool as a decryption oracle. The methods are flawed and, in the most...
CVE-2017-13093
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including modification of encrypted IP cyphertext to insert hardware trojans. The methods are flawed and, in the most egregious cases...
CVE-2017-13094
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including modification of the encryption key and insertion of hardware trojans in any IP. The methods are flawed and, in the most...
CVE-2017-13097
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including modification of Rights Block to remove or relax license requirement. The methods are flawed and, in the most egregious case...
CVE-2017-13096
CVE-2017-13096 concerns the IEEE P1735 standard where the Rights Block (RSA-encrypted AES key) can be modified to remove or relax access control. The connected sources document a cryptographic design flaw that enables an attacker with access to EDA tools or to the standard’s workflow to alter rig...
CVE-2017-13094 The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property (IP), including modification of the encryption key and insertion of hardware trojans in any IP
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including modification of the encryption key and insertion of hardware trojans in any IP. The methods are flawed and, in the most...
CVE-2017-13092
CVE-2017-13092 involves the IEEE P1735 standard and a flaw in hardware description language (HDL) syntax that can allow an electronic design automation (EDA) tool to act as a decryption oracle. The vulnerability enables recovery of plaintext IP from encrypted designs and may enable insertion of h...
CVE-2017-13096 The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property (IP), including modification of Rights Block to remove or relax access control
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including modification of Rights Block to remove or relax access control. The methods are flawed and, in the most egregious cases,...
CVE-2017-13094
The CVE-2017-13094 entry concerns flaws in the IEEE P1735 cryptographic workflow for encrypting electronic-design IP. The available documents describe that the standard enables manipulation of the encryption key and insertion of hardware trojans into IP, potentially allowing an attacker to recove...
CVE-2017-13095 The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property (IP), including modification of a license-deny response to a license grant
The P1735 IEEE standard describes flawed methods for encrypting electronic-design intellectual property IP, as well as the management of access rights for such IP, including modification of a license-deny response to a license grant. The methods are flawed and, in the most egregious cases, enable...