RUSTSEC-2026-0212 Potentially Incorrect Output of Constant-Time Swap/Select on Aarch64

The implementation of constant-time swap and select on aarch64 platforms used a cmp instruction in inline assembly to check whether an 8-bit wide selector was 0. The cmp instruction works on 32-bit registers, which included the unspecified high 24 bits of the cmp operand. Depending on the executi...