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NVD
NVD
added 2026/07/17 7:17 p.m.10 views

CVE-2026-50185

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits ar...

2CVSS0.00112EPSS
SaveExploits0References3
OSV
OSV
added 2026/07/17 7:17 p.m.5 views

DEBIAN-CVE-2026-50185

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits ar...

2CVSS5.4AI score0.00112EPSS
SaveExploits0References1
OSV
OSV
added 2026/07/17 6:35 p.m.5 views

CVE-2026-50185 RustCrypto Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits ar...

2CVSS5.5AI score
SaveExploits0References5
Debian CVE
Debian CVE
added 2026/07/17 6:35 p.m.8 views

CVE-2026-50185

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. From 0.1.1 until 0.5.4, the aarch64 implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs assume high bits ar...

2CVSS5.5AI score0.00112EPSS
SaveExploits0
OSV
OSV
added 2026/07/02 5:18 p.m.10 views

GHSA-3RJW-M598-PQ24 Cmov/CmovEq on aarch64 can produce wrong results if high-bits of registers are set

Summary The aarch64 implementations of Cmov and CmovEq seem to assume that the high bits when loading a value of size smaller than a register into a register are zero-extended. However, this is not the case and these bits are unspecified. This can result in a left.cmovz&right, condition not movin...

6.9CVSS5.5AI score0.00112EPSS
SaveExploits0References2
Positive Technologies
Positive Technologies
added 2026/07/02 12:0 a.m.18 views

PT-2026-55463

Name of the Vulnerable Software and Affected Versions RustCrypto CMOV versions 0.1.1 through 0.5.3 Description On aarch64 platforms, the implementations of Cmov and CmovEq in cmov/src/backends/aarch64.rs incorrectly assume that high bits are zero-extended when loading values smaller than a...

6.9CVSS5.3AI score0.00112EPSS
SaveExploits0References5
Vulnrichment
Vulnrichment
added 2026/01/15 7:13 p.m.4 views

CVE-2026-23519 RustCrypto cmov: thumbv6m-none-eabi compiler emits non-constant time assembly when using cmovnz

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. Prior to 0.4.4, the thumbv6m-none-eabi Cortex M0, M0+ and M1 compiler emits non-constant time assembly when using cmovnz...

8.9CVSS6.7AI score0.00498EPSS
SaveExploits1References2
EUVD
EUVD
added 2026/01/15 7:13 p.m.8 views

EUVD-2026-2731

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. Prior to 0.4.4, the thumbv6m-none-eabi Cortex M0, M0+ and M1 compiler emits non-constant time assembly when using cmovnz...

8.9CVSS6.6AI score0.00498EPSS
SaveExploits1References4
Positive Technologies
Positive Technologies
added 2026/01/15 12:0 a.m.14 views

PT-2026-3096

RustCrypto CMOV provides conditional move CPU intrinsics which are guaranteed on major platforms to execute in constant-time and not be rewritten as branches by the compiler. Prior to 0.4.4, the thumbv6m-none-eabi Cortex M0, M0+ and M1 compiler emits non-constant time assembly when using cmovnz...

8.9CVSS7.1AI score0.00498EPSS
SaveExploits1References2
RustSec
RustSec
added 2026/01/14 12:0 p.m.11 views

Non-constant-time code generation on ARM32 targets

Summary While the cmov crate has a special backend for aarch64 which uses special CSEL instructions, on 32-bit ARM it uses a portable pure Rust fallback implementation. This implementation uses a combination of bitwise arithmetic and core::hint::blackbox to attempt to coerce constant-time code...

9.8CVSS6.6AI score0.00498EPSS
SaveExploits1Affected Software1
OSV
OSV
added 2026/01/14 12:0 p.m.6 views

RUSTSEC-2026-0003 Non-constant-time code generation on ARM32 targets

Summary While the cmov crate has a special backend for aarch64 which uses special CSEL instructions, on 32-bit ARM it uses a portable pure Rust fallback implementation. This implementation uses a combination of bitwise arithmetic and core::hint::blackbox to attempt to coerce constant-time code...

8.9CVSS6.5AI score0.00498EPSS
SaveExploits1References3
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