175 matches found
Product update: Virtuozzo 6.0 Update 12 Hotfix 41 (6.0.12-3741)
This update provides hypervisor-related fixes for the Microarchitectural Store Buffer Data MDS vulnerability as well as a stability fix. Vulnerability id: PSBM-94407 The Microarchitectural Store Buffer Data MDS is a series of hardware vulnerabilities which allow speculative execution attacks on...
Virtuozzo 7 : bpftool / cpupools / cpupools-features / etc (VZA-2019-039)
According to the version of the bpftool / cpupools / cpupools-features / etc packages installed, the Virtuozzo installation on the remote host is affected by the following vulnerability : - The Microarchitectural Store Buffer Data MDS is a series of hardware vulnerabilities which allow speculativ...
Product update: Virtuozzo 7.0 Update 10 Hotfix 1 (7.0.10-320)
The Hotfix 1 for for Virtuozzo 7.0.10 mitigates the Microarchitectural Store Buffer Data MDS vulnerability and provides stability and usability bug fixes. Vulnerability id: PSBM-94407 The Microarchitectural Store Buffer Data MDS is a series of hardware vulnerabilities which allow speculative...
openSUSE Security Update : xen (openSUSE-2019-1403) (MDSUM/RIDL) (MFBDS/RIDL/ZombieLoad) (MLPDS/RIDL) (MSBDS/Fallout)
This update for xen fixes the following issues : Four new speculative execution information leak issues have been identified in Intel CPUs. bsc1111331 - CVE-2018-12126: Microarchitectural Store Buffer Data Sampling MSBDS - CVE-2018-12127: Microarchitectural Fill Buffer Data Sampling MFBDS -...
Oracle Linux 7 : Unbreakable Enterprise kernel (ELSA-2019-4643)
The remote Oracle Linux 7 host has packages installed that are affected by multiple vulnerabilities as referenced in the ELSA-2019-4643 advisory. - x86/mds: Add empty commit for CVE-2019-11091 Konrad Rzeszutek Wilk Orabug: 29721848 CVE-2019-11091 - x86/speculation/mds: Make mdsmitigation mutable...
Oracle Linux 6 / 7 : Unbreakable Enterprise kernel (ELSA-2019-4636)
The remote Oracle Linux 6 / 7 host has packages installed that are affected by multiple vulnerabilities as referenced in the ELSA-2019-4636 advisory. - x86/speculation/mds: Make cpumatches cpuinit Patrick Colp Orabug: 29751729 CVE-2018-12126 CVE-2018-12130 CVE-2018-12127 CVE-2019-11091 -...
Oracle Linux 6 / 7 : Unbreakable Enterprise kernel (ELSA-2019-4629)
The remote Oracle Linux 6 / 7 host has packages installed that are affected by multiple vulnerabilities as referenced in the ELSA-2019-4629 advisory. - x86/mds: Add empty commit for CVE-2019-11091 Konrad Rzeszutek Wilk Orabug: 29721935 CVE-2019-11091 - x86/speculation: Support 'mitigations='...
Oracle Linux 7 : Unbreakable Enterprise kernel (ELSA-2019-4628)
The remote Oracle Linux 7 host has packages installed that are affected by multiple vulnerabilities as referenced in the ELSA-2019-4628 advisory. - x86/mds: Add empty commit for CVE-2019-11091 Konrad Rzeszutek Wilk Orabug: 29721848 CVE-2019-11091 - x86/speculation/mds: Make mdsmitigation mutable...
Oracle Linux 5 / 6 : Unbreakable Enterprise kernel (ELSA-2019-4637)
The remote Oracle Linux 5 / 6 host has packages installed that are affected by multiple vulnerabilities as referenced in the ELSA-2019-4637 advisory. - x86/speculation/mds: Make cpumatches cpuinit Patrick Colp Orabug: 29752091 CVE-2018-12126 CVE-2018-12130 CVE-2018-12127 CVE-2019-11091 -...
Oracle Linux 6 : kernel (ELSA-2019-1169)
The remote Oracle Linux 6 host has packages installed that are affected by multiple vulnerabilities as referenced in the ELSA-2019-1169 advisory. - x86 x86/speculation/mds: Add SMT warning message Waiman Long 1692386 1692387 1692388 CVE-2018-12126 CVE-2018-12127 CVE-2018-12130 - x86...
hardware: Microarchitectural Store Buffer Data Sampling (MSBDS)
Modern Intel microprocessors implement hardware-level micro-optimizations to improve the performance of writing data back to CPU caches. The write operation is split into STA STore Address and STD STore Data sub-operations. These sub-operations allow the processor to hand-off address generation...
hardware: Microarchitectural Fill Buffer Data Sampling (MFBDS)
A flaw was found in the implementation of the "fill buffer", a mechanism used by modern CPUs when a cache-miss is made on L1 CPU cache. If an attacker can generate a load operation that would create a page fault, the execution will continue speculatively with incorrect data from the fill buffer...
hardware: Microarchitectural Fill Buffer Data Sampling (MFBDS)
A flaw was found in the implementation of the "fill buffer", a mechanism used by modern CPUs when a cache-miss is made on L1 CPU cache. If an attacker can generate a load operation that would create a page fault, the execution will continue speculatively with incorrect data from the fill buffer...
hardware: Microarchitectural Store Buffer Data Sampling (MSBDS)
Modern Intel microprocessors implement hardware-level micro-optimizations to improve the performance of writing data back to CPU caches. The write operation is split into STA STore Address and STD STore Data sub-operations. These sub-operations allow the processor to hand-off address generation...
hardware: Microarchitectural Store Buffer Data Sampling (MSBDS)
Modern Intel microprocessors implement hardware-level micro-optimizations to improve the performance of writing data back to CPU caches. The write operation is split into STA STore Address and STD STore Data sub-operations. These sub-operations allow the processor to hand-off address generation...
hardware: Microarchitectural Store Buffer Data Sampling (MSBDS)
Modern Intel microprocessors implement hardware-level micro-optimizations to improve the performance of writing data back to CPU caches. The write operation is split into STA STore Address and STD STore Data sub-operations. These sub-operations allow the processor to hand-off address generation...
hardware: Microarchitectural Store Buffer Data Sampling (MSBDS)
Modern Intel microprocessors implement hardware-level micro-optimizations to improve the performance of writing data back to CPU caches. The write operation is split into STA STore Address and STD STore Data sub-operations. These sub-operations allow the processor to hand-off address generation...
hardware: Microarchitectural Store Buffer Data Sampling (MSBDS)
Modern Intel microprocessors implement hardware-level micro-optimizations to improve the performance of writing data back to CPU caches. The write operation is split into STA STore Address and STD STore Data sub-operations. These sub-operations allow the processor to hand-off address generation...
hardware: Microarchitectural Fill Buffer Data Sampling (MFBDS)
A flaw was found in the implementation of the "fill buffer", a mechanism used by modern CPUs when a cache-miss is made on L1 CPU cache. If an attacker can generate a load operation that would create a page fault, the execution will continue speculatively with incorrect data from the fill buffer...
hardware: Microarchitectural Fill Buffer Data Sampling (MFBDS)
A flaw was found in the implementation of the "fill buffer", a mechanism used by modern CPUs when a cache-miss is made on L1 CPU cache. If an attacker can generate a load operation that would create a page fault, the execution will continue speculatively with incorrect data from the fill buffer...