19 matches found
EUVD-2026-92811
In AMD Versal™ Adaptive SoC devices, insufficient boundary checks in USB boot mode—when enabled through board modifications—could allow crafted images to trigger a buffer overflow and overwrite an active function pointer, which may result in arbitrary code execution during boot process. This...
CVE-2026-0482
In AMD Versal™ Adaptive SoC devices, insufficient boundary checks in USB boot mode—when enabled through board modifications—could allow crafted images to trigger a buffer overflow and overwrite an active function pointer, which may result in arbitrary code execution during boot process. This...
CVE-2026-0482
In AMD Versal™ Adaptive SoC devices, insufficient boundary checks in USB boot mode—when enabled through board modifications—could allow crafted images to trigger a buffer overflow and overwrite an active function pointer, which may result in arbitrary code execution during boot process. This...
CVE-2026-0482
The AMD Versal™ Adaptive SoC devices are vulnerable to a buffer overflow due to insufficient boundary checks within the USB boot mode . This vulnerability can be triggered by providing crafted images when USB boot mode is enabled through specific board modifications . Successful exploitation allo...
Versal Adaptive SoC – Secure Boot Bypass via Board Modifications and Crafted Boot Image
CVE Details Refer to Glossary for explanation of terms CVE| CVE Description| CVSS Base Score ---|---|--- CVE-2026-0482| In AMD Versal™ Adaptive SoC devices, insufficient boundary checks within the USB boot mode—when enabled via board modifications—allow crafted images to overflow a buffer and...
CVE-2025-54515
The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors TF-A for Arm’s Power State Coordination Interface PSCI commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were...
CVE-2025-54515
The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors TF-A for Arm’s Power State Coordination Interface PSCI commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were...
CVE-2025-54515
The Secure Flag passed to Versal™ Adaptive SoC’s Trusted Firmware for Cortex®-A processors TF-A for Arm’s Power State Coordination Interface PSCI commands were incorrectly set to secure instead of using the processor’s actual security state. This would allow the PSCI requests to appear they were...
CVE-2025-54515
The CVE describes a mis-set Secure Flag in the Versal Adaptive SoC’s ARM TF-A PSCI handling, where PSCI commands were marked secure instead of reflecting the processor’s actual security state. Affected: Versal Adaptive SoC with Cortex-A TF-A, enabling PSCI requests to appear from the secure state...
AMD Versal Adaptive SoC 安全漏洞
AMD Versal Adaptive SoC is a chip from UltraMicro Semiconductor AMD. A security vulnerability exists in the AMD Versal Adaptive SoC that stems from an improperly set security flag on the PSCI command, which could result in requests from a non-secure state being mistakenly recognized as coming fro...
CVE-2025-0036
In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime post-boot cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data...
CVE-2025-0037
In AMD Versal Adaptive SoC devices, the lack of address validation when executing PLM runtime services through the PLM firmware can allow access to isolated or protected memory spaces, resulting in the loss of integrity and confidentiality...
CVE-2025-0037: Improper Input Validation
In AMD Versal Adaptive SoC devices, the lack of address validation when executing PLM runtime services through the PLM firmware can allow access to isolated or protected memory spaces, resulting in the loss of integrity and confidentiality...
CVE-2025-0036: Incorrect Calculation
In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime post-boot cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data...
CVE-2025-0036
In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime post-boot cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data...
CVE-2025-0036
In AMD Versal Adaptive SoC devices, the incorrect configuration of the SSS during runtime post-boot cryptographic operations could cause data to be incorrectly written to and read from invalid locations as well as returning incorrect cryptographic data...
PT-2025-24579 · Amd · Amd Versal Adaptive Soc
Name of the Vulnerable Software and Affected Versions: AMD Versal Adaptive SoC devices affected versions not specified Description: The issue arises from the incorrect configuration of the Secure Stream Switch SSS during runtime, specifically after the system has booted, which could cause data to...
Versal Adaptive SoC – Overwriting Protected Memory Regions through PLM Firmware
AMD ID: AMD-SB-8010 Potential Impact: Loss of confidentiality and Integrity Severity: Medium Summary In Versal™ Adaptive SoC devices, the Platform Loader and Manager PLM implements runtime post-boot software services that can allow a remote processor to command the PLM to execute cryptographic...
Versal™ Adaptive SoC – Improper Configuration of the Secure Stream Switch during Post-Boot Cryptographic Operations
AMD ID: AMD-SB-8011 Potential Impact: N/A Severity: N/A Summary In Versal™ Adaptive SoC devices, the Platform Loader and Manager PLM implements runtime post-boot software services that allows a remote processor to command the PLM to execute cryptographic operations – including AES, SHA3, RSA, ECD...