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OSV
OSV
added 2026/05/29 11:11 a.m.5 views

OESA-2026-2529 microcode_ctl security update

This is a tool to transform and deploy microcode update for x86 CPUs. Security Fixes: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Processors within VMX non-root guest operation may allow an information...

6.8CVSS5.4AI score0.00096EPSS
SaveExploits0References2
OSV
OSV
added 2026/05/22 11:11 a.m.11 views

OESA-2026-2461 microcode_ctl security update

This is a tool to transform and deploy microcode update for x86 CPUs. Security Fixes: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Processors within VMX non-root guest operation may allow an information...

6.8CVSS5.4AI score0.00096EPSS
SaveExploits0References2
OSV
OSV
added 2026/05/22 11:11 a.m.7 views

OESA-2026-2460 microcode_ctl security update

This is a tool to transform and deploy microcode update for x86 CPUs. Security Fixes: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Processors within VMX non-root guest operation may allow an information...

6.8CVSS5.4AI score0.00096EPSS
SaveExploits0References2
OSV
OSV
added 2026/05/22 11:11 a.m.8 views

OESA-2026-2458 microcode_ctl security update

This is a tool to transform and deploy microcode update for x86 CPUs. Security Fixes: Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution for some IntelR Processors within VMX non-root guest operation may allow an information...

6.8CVSS5.4AI score0.00096EPSS
SaveExploits0References2
FreeBSD
FreeBSD
added 2016/11/22 12:00 a.m.28 views

xen-kernel -- x86 task switch to VM86 mode mis-handled

The Xen Project reports: LDTR, just like TR, is purely a protected mode facility. Hence even when switching to a VM86 mode task, LDTR loading needs to follow protected mode semantics. This was violated by the code. On SVM AMD hardware: a malicious unprivileged guest process can escalate its...

7.8CVSS1.2AI score0.00452EPSS
SaveExploits0References1
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