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OSV
OSV
•added 2026/09/16 11:17 a.m.•8 views

DEBIAN-CVE-2026-89915

In the Linux kernel, the following vulnerability has been resolved: KVM: arm64: Remove VM-wide VNCR mapping counter The global VNCR mapping counter is used to decide whether an L1 provided VNCR page is mapped in L0 on any CPU at the point of dealing with a TLB invalidation. It is incremented when...

9.3CVSS5.8AI score0.00194EPSS
SaveExploits0References1
Cvelist
Cvelist
•added 2026/09/16 10:32 a.m.•34 views

CVE-2026-89915 KVM: arm64: Remove VM-wide VNCR mapping counter

In the Linux kernel, the following vulnerability has been resolved: KVM: arm64: Remove VM-wide VNCR mapping counter The global VNCR mapping counter is used to decide whether an L1 provided VNCR page is mapped in L0 on any CPU at the point of dealing with a TLB invalidation. It is incremented when...

9.3CVSS0.00194EPSS
SaveExploits0References3
SUSE CVE
SUSE CVE
•added 2026/05/09 2:40 a.m.•17 views

SUSE CVE-2026-43220

In the Linux kernel, the following vulnerability has been resolved: iommu/amd: serialize sequence allocation under concurrent TLB invalidations With concurrent TLB invalidations, completion wait randomly gets timed out because cmdsemval was incremented outside the IOMMU spinlock, allowing...

5.5CVSS5.7AI score0.00162EPSS
SaveExploits2References17
OSV
OSV
•added 2026/05/06 11:28 a.m.•11 views

CVE-2026-43220 iommu/amd: serialize sequence allocation under concurrent TLB invalidations

In the Linux kernel, the following vulnerability has been resolved: iommu/amd: serialize sequence allocation under concurrent TLB invalidations With concurrent TLB invalidations, completion wait randomly gets timed out because cmdsemval was incremented outside the IOMMU spinlock, allowing...

5.9AI score
SaveExploits0References8
Rapid7 Vulnerability Database (full)
Rapid7 Vulnerability Database (full)
•added 2026/05/06 12:00 a.m.•1 views

CVE-2026-43220: Undefined Security Weakness

In the Linux kernel, the following vulnerability has been resolved: iommu/amd: serialize sequence allocation under concurrent TLB invalidations With concurrent TLB invalidations, completion wait randomly gets timed out because cmdsemval was incremented outside the IOMMU spinlock, allowing...

5.5CVSS5.8AI score0.00162EPSS
SaveExploits2References4
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