7 matches found
CVE-2026-97587
The Linux kernel contained a vulnerability in the perf subsystem affecting RISC-V architectures. The issue stemmed from the available-counter mask being stored as a single unsigned long , while the iteration process used RISCV_MAX_COUNTERS (64). On RV32 systems, this caused the kernel to read pas...
EUVD-2026-86895
In the Linux kernel, the following vulnerability has been resolved: perf: RISC-V: store available counter mask as bitmap The available-counter mask was a single unsigned long, but iteration uses RISCVMAXCOUNTERS, which is 64. On RV32 that reads past the object. Filling with an unsigned-long bit a...
CVE-2025-51678
The RISC-V PicoRV32 processor, specifically commit 87c89a , contains a vulnerability where a mismatch between the PCPI INSN and the memory address can lead to unexpected behavior . PCPI refers to the Processor Control Interface used for handling specific processor control instructions. No informa...
PT-2026-60870
Name of the Vulnerable Software and Affected Versions RISC-V PicoRV32 version 87c89a Description A mismatch between the PCPI INSN and the memory address can result in unexpected behavior. PCPI Processor Control Interface is a mechanism used to handle specific processor control instructions...
CVE-2025-51678
An issue was discovered in RISC-V PicoRV32 commit 87c89a. A mismatch in the PCPI INSN and memory address can lead to unexpected behavior...
CGA-VJ74-WG5J-RV32
Bulletin has no description...
GSD-2022-1005367 RISC-V: Fix counter restart during overflow for RV32
RISC-V: Fix counter restart during overflow for RV32 This is an automated ID intended to aid in discovery of potential security vulnerabilities. The actual impact and attack plausibility have not yet been proven. This ID is fixed in Linux Kernel version v5.19.2 by commit...