CVE-2021-0095

CVE-2021-0095 describes improper initialization in the firmware for some Intel processors that may allow a local attacker to cause a denial of service. The NVD entry notes the impact as Availability (PARTIAL) with a low CVSS2 base score (2.1) and a MEDIUM CVSS3.1 score (4.4) requiring local acces...

CVE-2021-0095

Improper initialization in the firmware for some IntelR Processors may allow a privileged user to potentially enable a denial of service via local access...

CVE-2020-12359

CVE-2020-12359 concerns Intel processor firmware with insufficient control flow management. The vulnerability could allow an unauthenticated user to escalate privileges via physical access. Connected sources tie this to Intel processor firmware issues and list remediation paths in affected IBM Cl...

CVE-2020-12359

Insufficient control flow management in the firmware for some IntelR Processors may allow an unauthenticated user to potentially enable escalation of privilege via physical access...

CVE-2020-8700

Improper input validation in the firmware for some IntelR Processors may allow a privileged user to potentially enable escalation of privilege via local access...

CVE-2020-8670

CVE-2020-8670 is a race-condition flaw in Intel processor firmware that could allow a local privileged attack. No public exploits are known in the provided documents. Affected data indicates local access is required, with INTEL-SA advisories (INTEL-SA-00463) and related mitigations referenced by ...

USN-4985-1 intel-microcode vulnerabilities

It was discovered that some Intel processors may not properly invalidate cache entries used by Intel Virtualization Technology for Directed I/O VT-d. This may allow a local user to perform a privilege escalation attack. CVE-2020-24489 Joseph Nuzman discovered that some Intel processors may not...

hw: observable timing discrepancy in some Intel Processors

Observable timing discrepancy in some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

Important: Red Hat Security Advisory: microcode_ctl security, bug fix and enhancement update

An update for microcodectl is now available for Red Hat Enterprise Linux 7. Red Hat Product Security has rated this update as having a security impact of Important. A Common Vulnerability Scoring System CVSS base score, which gives a detailed severity rating, is available for each vulnerability...

hw: information disclosure on some Intel Atom processors

A potential domain bypass transient execution vulnerability was discovered on some Intel Atom® processors that uses a microarchitectural incidental channel. Currently this channel can reveal supervisor data in the L1 cache and the contents of recent stores. As a consequence, this issue may allow ...

hw: improper isolation of shared resources in some Intel Processors

Microcode misconfiguration in some Intel processors may cause EIBRS mitigation CVE-2017-5715 to be incomplete. As a consequence, this issue may allow an authenticated user to potentially enable information disclosure via local access...

hw: observable timing discrepancy in some Intel Processors

Observable timing discrepancy in some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

hw: information disclosure on some Intel Atom processors

A potential domain bypass transient execution vulnerability was discovered on some Intel Atom® processors that uses a microarchitectural incidental channel. Currently this channel can reveal supervisor data in the L1 cache and the contents of recent stores. As a consequence, this issue may allow ...

hw: improper isolation of shared resources in some Intel Processors

Microcode misconfiguration in some Intel processors may cause EIBRS mitigation CVE-2017-5715 to be incomplete. As a consequence, this issue may allow an authenticated user to potentially enable information disclosure via local access...

hw: information disclosure on some Intel Atom processors

A potential domain bypass transient execution vulnerability was discovered on some Intel Atom® processors that uses a microarchitectural incidental channel. Currently this channel can reveal supervisor data in the L1 cache and the contents of recent stores. As a consequence, this issue may allow ...

hw: observable timing discrepancy in some Intel Processors

Observable timing discrepancy in some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

hw: improper isolation of shared resources in some Intel Processors

Microcode misconfiguration in some Intel processors may cause EIBRS mitigation CVE-2017-5715 to be incomplete. As a consequence, this issue may allow an authenticated user to potentially enable information disclosure via local access...

hw: information disclosure on some Intel Atom processors

A potential domain bypass transient execution vulnerability was discovered on some Intel Atom® processors that uses a microarchitectural incidental channel. Currently this channel can reveal supervisor data in the L1 cache and the contents of recent stores. As a consequence, this issue may allow ...

hw: vt-d related privilege escalation

A flaw was found in Intel® VT-d products. Entries from the context cache on some types of context cache invalidations may not be properly invalidated which may allow an authenticated user to potentially enable escalation of privilege via local access. The highest threat from this vulnerability is...

hw: observable timing discrepancy in some Intel Processors

Observable timing discrepancy in some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...