8417 matches found
SUSE CVE-2024-43851
In the Linux kernel, the following vulnerability has been resolved: soc: xilinx: rename cpunumber1 to dummycpunumber The per cpu variable cpunumber1 is passed to xlnxeventhandler as argument "devid", but it is not used in this function. So drop the initialization of this variable and rename it to...
Cleaning an ECS-enabled cache may cause excessive CPU load
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SUSE SLES12 Security Update : ucode-intel (SUSE-SU-2024:2941-1)
The remote SUSE Linux SLES12 / SLESSAP12 host has a package installed that is affected by multiple vulnerabilities as referenced in the SUSE-SU-2024:2941-1 advisory. - Intel CPU Microcode was updated to the 20240813 release bsc1229129 - CVE-2024-24853: Security updates for INTEL- SA-01083 -...
riscv: prevent pt_regs corruption for secondary idle threads
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SUSE CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
SUSE CVE-2024-24980
Protection mechanism failure in some 3rd, 4th, and 5th Generation IntelR XeonR Processors may allow a privileged user to potentially enable escalation of privilege via local access...
bind9: bind: SIG(0) can be used to exhaust CPU resources
A flaw was found in the bind9 package, where if a DNS server hosts a zone containing a "KEY" resource record or a DNS resolver utilizes the DNSSEC validate feature to validate a "KEY" resource record, a malicious client could exhaust the CPU resourced from the resolver by sending a stream of SIG0...
CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
CVE-2023-42667
Improper isolation in the IntelR CoreTM Ultra Processor stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access...
CVE-2023-42667
Improper isolation in the IntelR CoreTM Ultra Processor stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access...
CVE-2023-42667
Improper isolation in the IntelR CoreTM Ultra Processor stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access...
CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
CVE-2024-24853
The connected advisories corroborate CVE-2024-24853: it concerns an incorrect behavior order during the transition between the executive monitor and the SMI transfer monitor (STM) in certain Intel processors, enabling privilege escalation via local access. Affected area is Intel CPU microcode/fir...
CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
CVE-2024-24853
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...
CVE-2023-42667: Improper Isolation of Shared Resources on System-on-a-Chip (SoC)
Improper isolation in the IntelR CoreTM Ultra Processor stream cache mechanism may allow an authenticated user to potentially enable escalation of privilege via local access...
CVE-2024-24853: Incorrect Behavior Order
Incorrect behavior order in transition between executive monitor and SMI transfer monitor STM in some IntelR Processor may allow a privileged user to potentially enable escalation of privilege via local access...