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NVD
NVD
added 2025/05/13 9:16 p.m.6 views

CVE-2025-20103

Insufficient resource pool in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.5CVSS0.00161EPSS
SaveExploits0References2
OSV
OSV
added 2025/05/13 9:16 p.m.4 views

ALPINE-CVE-2025-20103

Insufficient resource pool in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

5.7CVSS6.3AI score0.00161EPSS
SaveExploits0References1
OSV
OSV
added 2025/05/13 9:16 p.m.3 views

DEBIAN-CVE-2025-20103

Insufficient resource pool in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

5.7CVSS6.3AI score0.00161EPSS
SaveExploits0References1
OSV
OSV
added 2025/05/13 9:16 p.m.8 views

CVE-2025-20054

Uncaught exception in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.4AI score
SaveExploits0References1
NVD
NVD
added 2025/05/13 9:16 p.m.7 views

CVE-2025-20054

Uncaught exception in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.8CVSS0.00167EPSS
SaveExploits0References2
OSV
OSV
added 2025/05/13 9:16 p.m.1 views

DEBIAN-CVE-2025-20054

Uncaught exception in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.8CVSS6.3AI score0.00167EPSS
SaveExploits0References1
OSV
OSV
added 2025/05/13 9:16 p.m.2 views

ALPINE-CVE-2025-20054

Uncaught exception in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.8CVSS6.3AI score0.00167EPSS
SaveExploits0References1
NVD
NVD
added 2025/05/13 9:16 p.m.7 views

CVE-2025-20012

Incorrect behavior order for some IntelR Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access...

4.9CVSS0.00259EPSS
SaveExploits0References2
OSV
OSV
added 2025/05/13 9:16 p.m.6 views

CVE-2025-20012

Incorrect behavior order for some IntelR Core™ Ultra Processors may allow an unauthenticated user to potentially enable information disclosure via physical access...

6.3AI score
SaveExploits0References1
OSV
OSV
added 2025/05/13 9:16 p.m.5 views

ALPINE-CVE-2024-45332

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6AI score0.00261EPSS
SaveExploits0References1
NVD
NVD
added 2025/05/13 9:16 p.m.9 views

CVE-2024-45332

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS0.00261EPSS
SaveExploits0References4
OSV
OSV
added 2025/05/13 9:16 p.m.7 views

CVE-2024-45332

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

6AI score
SaveExploits0References3
OSV
OSV
added 2025/05/13 9:16 p.m.9 views

UBUNTU-CVE-2024-45332

Exposure of sensitive information caused by shared microarchitectural predictor state that influences transient execution in the indirect branch predictors for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS7AI score0.00261EPSS
SaveExploits0References9
OSV
OSV
added 2025/05/13 9:16 p.m.7 views

UBUNTU-CVE-2025-20103

Insufficient resource pool in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.5CVSS5.8AI score0.00161EPSS
SaveExploits0References6
OSV
OSV
added 2025/05/13 9:16 p.m.6 views

UBUNTU-CVE-2025-20054

Uncaught exception in the core management mechanism for some IntelR Processors may allow an authenticated user to potentially enable denial of service via local access...

6.8CVSS5.8AI score0.00167EPSS
SaveExploits0References6
NVD
NVD
added 2025/05/13 9:15 p.m.10 views

CVE-2024-28956

Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS0.00403EPSS
SaveExploits0References7
OSV
OSV
added 2025/05/13 9:15 p.m.8 views

ALPINE-CVE-2024-28956

Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS7.5AI score0.00403EPSS
SaveExploits0References1
OSV
OSV
added 2025/05/13 9:15 p.m.4 views

CVE-2024-28956

Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

6.2AI score
SaveExploits0References3
OSV
OSV
added 2025/05/13 9:15 p.m.1 views

DEBIAN-CVE-2024-28956

Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.7AI score0.00403EPSS
SaveExploits0References1
OSV
OSV
added 2025/05/13 9:15 p.m.7 views

UBUNTU-CVE-2024-28956

Exposure of Sensitive Information in Shared Microarchitectural Structures during Transient Execution for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local access...

5.7CVSS6.7AI score0.00403EPSS
SaveExploits0References9
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