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Cvelist
Cvelist
•added 2026/08/19 12:00 a.m.•40 views

CVE-2026-50719

The Ingenic T41, and probably also T32, T40, and A1 SoC boot ROMs parse and execute an attacker-controlled init table from the SPL header before checking the secure boot state and before invoking signature verification. The init table parser supports full-address 32-bit write operations, allowing...

0.00147EPSS
SaveExploits0References1
Rapid7 Vulnerability Database (full)
Rapid7 Vulnerability Database (full)
•added 2026/08/19 12:00 a.m.•1 views

CVE-2026-50719: Improper Access Control

The Ingenic T41, and probably also T32, T40, and A1 SoC boot ROMs parse and execute an attacker-controlled init table from the SPL header before checking the secure boot state and before invoking signature verification. The init table parser supports full-address 32-bit write operations, allowing...

6.8CVSS6AI score0.00147EPSS
SaveExploits0References4
Positive Technologies
Positive Technologies
•added 2026/08/19 12:00 a.m.•29 views

PT-2026-78354

The Ingenic T41, and probably also T32, T40, and A1 SoC boot ROMs parse and execute an attacker-controlled init table from the SPL header before checking the secure boot state and before invoking signature verification. The init table parser supports full-address 32-bit write operations, allowing...

5.3AI score0.00147EPSS
SaveExploits0References2
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