EUVD-2020-7212

Malware in sbrugna...

EUVD-2020-2047

Malware in sbrugna...

EUVD-2025-24063

Malicious code in bioql PyPI...

Linux Distros Unpatched Vulnerability : CVE-2020-0550

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - Improper data forwarding in some data cache for some IntelR Processors may allow an authenticated user to potentially enable information disclosure via local...

CVE-2025-8774

A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this...

Linux Distros Unpatched Vulnerability : CVE-2018-3620

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - Systems with microprocessors utilizing speculative execution and address translations may allow unauthorized disclosure of information residing in the L1 data...

CVE-2025-8774

A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this...

CVE-2025-8774 riscv-boom SonicBOOM L1 Data Cache timing discrepancy

A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this...

CVE-2025-8774 riscv-boom SonicBOOM L1 Data Cache timing discrepancy

A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this...

CVE-2025-8774 riscv-boom SonicBOOM L1 Data Cache timing discrepancy

A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this...

PT-2025-32455 · Sonicboom · Sonicboom

Name of the Vulnerable Software and Affected Versions: riscv-boom SonicBOOM versions through 2.2.3 Description: A timing discrepancy exists in the L1 Data Cache Handler component of the software. This issue is considered problematic and requires local access for exploitation, which is described a...

riscv-boom SonicBOOM 安全漏洞

riscv-boom SonicBOOM is a SonicBOOM: The Berkeley Out-of-Order RISC-V Processor open source SonicBOOM: The Berkeley Chaos Machine. A security vulnerability exists in riscv-boom SonicBOOM 2.2.3 and earlier versions, which stems from an observable timing difference issue in the component L1 Data...

Linux Distros Unpatched Vulnerability : CVE-2017-5754

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - Systems with microprocessors utilizing speculative execution and indirect branch prediction may allow unauthorized disclosure of information to an attacker with...

SUSE CVE-2024-36357

A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in the leakage of sensitive information across privileged boundaries...

DEBIAN-CVE-2024-36357

A transient execution vulnerability in some AMD processors may allow an attacker to infer data in the L1D cache, potentially resulting in the leakage of sensitive information across privileged boundaries...

AMD Processors 安全漏洞

AMD Processors is a processor from Ultraviolet Semiconductor AMD. A security vulnerability exists in AMD Processors that stems from the possibility that an attacker could infer data in the L1D cache, potentially leading to the disclosure of sensitive information across privileged boundaries...

CVE-2023-37517

Missing "no cache" headers in HCL Leap permits sensitive data to be cached...

kernel: arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array

In the Linux kernel, the following vulnerability has been resolved: arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array The loop that detects/populates cache information already has a bounds check on the array size but does not account for cache levels with separate data/instructions...

kernel: arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array

In the Linux kernel, the following vulnerability has been resolved: arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array The loop that detects/populates cache information already has a bounds check on the array size but does not account for cache levels with separate data/instructions...

kernel: arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array

In the Linux kernel, the following vulnerability has been resolved: arm64: cacheinfo: Avoid out-of-bounds write to cacheinfo array The loop that detects/populates cache information already has a bounds check on the array size but does not account for cache levels with separate data/instructions...