Hardware-Vulnerability-with-Proof-of-Concept-

🛡️ Spectre Variant 2 CVE-2017-5715 — Investigación de Vulnerabilidad de Hardware Un documento de investigación en profundidad y una Prueba de Concepto PoC práctica que explora ataques de ejecución especulativa en CPUs modernas. 📖 Resumen Este proyecto es una exploración de investigación y...

meltdown-exploit

MELTDOWN 漏洞利用概念验证 推测执行以不安全的方式执行代码，会在微架构（如缓存）中留下数据痕迹。 Lipp 等人于 2018 年 1 月 9 日在 https://github.com/IAIK/meltdown 发布了他们的代码。详情请参考他们的论文：https://meltdownattack.com/meltdown.pdf。 目前只能转储 linuxprocbanner，因为所需内存必须在缓存中，而每次读取 /proc/version 时 linuxprocbanner 都会被缓存。可能与 prefetch 配合使用。与 schedyield 配合使用。 使用 make...

spectre-attack-example

Rutina de ataque Spectre 2 de enero de 2018 CVE-2017-5753 y CVE-2017-5715 Ejemplo de explotación de la vulnerabilidad "Spectre" ¿Qué es esto? Colocamos el texto "The Magic Words are Squeamish Ossifrage." en la memoria, y luego intentamos leerlo explotando la vulnerabilidad. Si el sistema es...

Linux Distros Unpatched Vulnerability : CVE-2020-10941

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - Arm Mbed TLS before 2.16.5 allows attackers to obtain sensitive information an RSA private key by measuring cache usage during an import. CVE-2020-10941 Note th...

PT-2026-28187

Name of the Vulnerable Software and Affected Versions Database Backup for WordPress versions prior to 2.5.3 Description An authorization bypass exists because the plugin fails to restrict access to the wp db temp dir parameter, which determines the storage location for database backups...

JLSEC-2025-200 Arm Mbed TLS before 2.16.5 allows attackers to obtain sensitive information (an RSA private key) by...

Arm Mbed TLS before 2.16.5 allows attackers to obtain sensitive information an RSA private key by measuring cache usage during an import...

Systematic Assessment of Cache Timing Vulnerabilities on RISC-V Processors

While interest in the open RISC-V instruction set architecture is growing, tools to assess the security of concrete processor implementations are lacking. There are dedicated tools and benchmarks for common microarchitectural side-channel vulnerabilities for popular processor families such as Int...

EUVD-2020-7306

Malware in sbrugna...

EUVD-2022-48288

Malicious code in bioql PyPI...

EUVD-2023-1119

Malicious code in bioql PyPI...

Arm Mbed TLS before 2.16.5 allows attackers to obtain sensitive information (an RSA private key) by measuring cache usage during an import.

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Linux Distros Unpatched Vulnerability : CVE-2021-26933

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - An issue was discovered in Xen 4.9 through 4.14.x. On Arm, a guest is allowed to control whether memory accesses are bypassing the cache. This means that Xen...

Linux Distros Unpatched Vulnerability : CVE-2020-15309

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - An issue was discovered in wolfSSL before 4.5.0, when single precision is not employed. Local attackers can conduct a cache-timing attack against public key...

Linux Distros Unpatched Vulnerability : CVE-2024-45191

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - An issue was discovered in Matrix libolm through 3.2.16. The AES implementation is vulnerable to cache- timing attacks due to use of S-boxes. This is related to...

Linux Distros Unpatched Vulnerability : CVE-2016-7439

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - The C software implementation of RSA in wolfSSL formerly CyaSSL before 3.9.10 makes it easier for local users to discover RSA keys by leveraging cache-bank hit...

Linux Distros Unpatched Vulnerability : CVE-2024-45192

The Linux/Unix host has one or more packages installed that are impacted by a vulnerability without a vendor supplied patch available. - An issue was discovered in Matrix libolm through 3.2.16. Cache-timing attacks can occur due to use of base64 when decoding group session keys. This refers to th...

CVE-2025-8774 riscv-boom SonicBOOM L1 Data Cache timing discrepancy

A vulnerability has been found in riscv-boom SonicBOOM up to 2.2.3 and classified as problematic. Affected by this vulnerability is an unknown functionality of the component L1 Data Cache Handler. The manipulation leads to observable timing discrepancy. Local access is required to approach this...

riscv-boom SonicBOOM 安全漏洞

riscv-boom SonicBOOM is a SonicBOOM: The Berkeley Out-of-Order RISC-V Processor open source SonicBOOM: The Berkeley Chaos Machine. A security vulnerability exists in riscv-boom SonicBOOM 2.2.3 and earlier versions, which stems from an observable timing difference issue in the component L1 Data...

CVE-2020-15309

An issue was discovered in wolfSSL before 4.5.0, when single precision is not employed. Local attackers can conduct a cache-timing attack against public key operations. These attackers may already have obtained sensitive information if the affected system has been used for private key operations...

Security Bulletin: IBM Storage Fusion Data Foundation is vulnerable to an Observable Timing Discrepancy in Vault (CVE-2023-25000)

Summary Vault is used by IBM Storage Fusion Data Foundation in mcg, ocs, odr, cephcsi, and odr operators as part of credential management. This bulletin identifies the steps to take to address the vulnerability in IBM Storage Fusion Data Foundation. CVE-2023-25000. Vulnerability Details...