12696 matches found
CVE-2026-17093 Power System Buffer Overflow
IBM Power Systems Firmware FW1120.00, FW1110.00 through FW1110.30, FW1060.00 through FW1060.80, FW950.00 through FW950.H2, OP940.00 through OP940.a1 Power9, and OP940.00 - OP940.81 Power HMC is affected by a vulnerability in host firmware configuration parsing. An attacker with service-level acce...
EUVD-2026-62633
IBM Power Systems Firmware FW1120.00, FW1110.00 through FW1110.30, FW1060.00 through FW1060.80, FW950.00 through FW950.H2, OP940.00 through OP940.a1 Power9, and OP940.00 - OP940.81 Power HMC is affected by a vulnerability in host firmware configuration parsing. An attacker with service-level acce...
CVE-2026-17093
IBM Power Systems firmware (FW950, FW1060, FW1110, FW1120, OP940) is vulnerable to CWE-121 stack-based buffer overflow in host firmware configuration parsing. An attacker with BMC/FSP service-level access can compromise the host firmware boot stage and everything subsequently loaded, with CVSS 8....
CVE-2026-19234
Power Systems Firmware FW1120.00, FW1110.00 through FW1110.30, and FW1060.00 through FW1060.80 is affected by a vulnerability in the host firmware boot process image validation path. An attacker with service access to the service processor can supply a maliciously crafted code update image,...
CVE-2026-19234 Power System Buffer Overflow
Power Systems Firmware FW1120.00, FW1110.00 through FW1110.30, and FW1060.00 through FW1060.80 is affected by a vulnerability in the host firmware boot process image validation path. An attacker with service access to the service processor can supply a maliciously crafted code update image,...
CVE-2026-19234 Power System Buffer Overflow
Power Systems Firmware FW1120.00, FW1110.00 through FW1110.30, and FW1060.00 through FW1060.80 is affected by a vulnerability in the host firmware boot process image validation path. An attacker with service access to the service processor can supply a maliciously crafted code update image,...
EUVD-2026-62674
Power Systems Firmware FW1120.00, FW1110.00 through FW1110.30, and FW1060.00 through FW1060.80 is affected by a vulnerability in the host firmware boot process image validation path. An attacker with service access to the service processor can supply a maliciously crafted code update image,...
CVE-2026-19234
IBM Power Systems firmware (FW1120.00, FW1110.00–.30, FW1060.00–.80) suffers CWE-121 stack-based buffer overflow in the host boot image validation path. An attacker with service processor access can inject a malicious code update image, achieving arbitrary host code execution with HIGH confidenti...
CVE-2024-13942 Rockchip RK3588s Secure BootROM TOCTOU (time-of-check to time-of-use) vulnerability leading to arbitrary code execution with highest privileges
Secure BootROM of RK3588s SoC is vulnerable to a time-of-check to time-of-use attack in case of booting from external media SPI NOR or NAND, EMMC or SD. The code reads the header of the next-stage loader twice. The header contains hashes of the executable modules and is signed with a private key,...
CVE-2024-13942
The RK3588s BootROM (secure) version 350B20210512V100 reads the next-stage loader header twice: a partial read (module hashes only) and a full read (with signature). Module authenticity is checked against the partial data, enabling a TOCTOU attack where an attacker swaps in a modified header on-t...
EUVD-2024-55729
Secure BootROM of RK3588s SoC is vulnerable to a time-of-check to time-of-use attack in case of booting from external media SPI NOR or NAND, EMMC or SD. The code reads the header of the next-stage loader twice. The header contains hashes of the executable modules and is signed with a private key,...
CVE-2026-50720
The Ingenic T31 SoC boot ROM flash-boot verification path compares only a single 32-bit word of the RSA signature output against a single 32-bit word of the SHA-256 payload digest, rather than compare the full data. This allows an attacker with physical write access to boot media to forge modifie...
CVE-2026-50719
The Ingenic T41, and probably also T32, T40, and A1 SoC boot ROMs parse and execute an attacker-controlled init table from the SPL header before checking the secure boot state and before invoking signature verification. The init table parser supports full-address 32-bit write operations, allowing...
Malicious code in arb-kit (npm)
--- -= Per source details. Do not edit below this line.=- Source: amazon-inspector ef3587f45144a9473e246cbffd1c4d03c2f895aa5052801282c4e1dd3e76be30 arb-kit advertises itself as an Arbitrum ABI/gas toolkit, but the main entry index.js contains an IIFE that, 37 seconds after require, reads a base64...
Exploit for CVE-2026-16723
🚨 CVE-2026-16723 — fastjson 1.2.83 @JSONType resource detect...
PT-2026-78634
Name of the Vulnerable Software and Affected Versions IBM PowerVM Hypervisor version FW1120.00 IBM PowerVM Hypervisor versions FW1110.00 through FW1110.30 IBM PowerVM Hypervisor versions FW1060.00 through FW1060.80 IBM PowerVM Hypervisor versions FW950.00 through FW950.H2 Description A flaw exist...
PT-2026-78354
Name of the Vulnerable Software and Affected Versions Ingenic T41 affected versions not specified Ingenic T32 affected versions not specified Ingenic T40 affected versions not specified Ingenic A1 affected versions not specified Description Boot ROMs in certain SoC System on Chip components parse...
EUVD-2026-62479
The Ingenic T41, and probably also T32, T40, and A1 SoC boot ROMs parse and execute an attacker-controlled init table from the SPL header before checking the secure boot state and before invoking signature verification. The init table parser supports full-address 32-bit write operations, allowing...
CVE-2026-50719
The Ingenic T41 , and likely the T32, T40, and A1 SoCs, are vulnerable in their boot ROMs due to an improper handling of the SPL header init table. The boot ROM parses and executes an attacker-controlled init table before performing secure boot state checks or signature verification. Because the ...
CVE-2026-50719
The Ingenic T41, and probably also T32, T40, and A1 SoC boot ROMs parse and execute an attacker-controlled init table from the SPL header before checking the secure boot state and before invoking signature verification. The init table parser supports full-address 32-bit write operations, allowing...