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{"id": "RHSA-2020:2758", "vendorId": null, "type": "redhat", "bulletinFamily": "unix", "title": "(RHSA-2020:2758) Moderate: microcode_ctl security, bug fix and enhancement update", "description": "Security Fix(es):\n\n* hw: Special Register Buffer Data Sampling (SRBDS) (CVE-2020-0543)\n\n* hw: L1D Cache Eviction Sampling (CVE-2020-0549)\n\n* hw: Vector Register Data Sampling (CVE-2020-0548)\n\nFor more details about the security issue(s), including the impact, a CVSS\nscore, acknowledgments, and other related information, refer to the CVE page(s)\nlisted in the References section.\n\nBug Fix(es):\n\n* Update Intel CPU microcode to microcode-20200609 release:\n - Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode from revision 0x61f\n up to 0x621;\n - Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode from revision 0x718\n up to 0x71a;\n - Update of 06-3c-03/0x32 (HSW C0) microcode from revision 0x27 up to 0x28;\n - Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from revision 0x2e\n up to 0x2f;\n - Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from revision 0x25\n up to 0x26;\n - Update of 06-46-01/0x32 (HSW-H C0) microcode from revision 0x1b up to 0x1c;\n - Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode from revision 0x21\n up to 0x22;\n - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xd6\n up to 0xdc;\n - Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000151\n up to 0x1000157;\n - Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1) microcode\n (in intel-06-55-04/intel-ucode/06-55-04) from revision 0x2000065\n up to 0x2006906;\n - Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400002c\n up to 0x4002f01;\n - Update of 06-55-07/0xbf (CLX-SP B1) microcode from revision 0x500002c\n up to 0x5002f01;\n - Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from revision 0xd6\n up to 0xdc;\n - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x46\n up to 0x78;\n - Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from revision 0xca\n up to 0xd6;\n - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xca\n up to 0xd6;\n - Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from revision 0xca\n up to 0xd6;\n - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xca\n up to 0xd6;\n - Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U V0) microcode\n from revision 0xca up to 0xd6;\n - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from revision\n 0xca up to 0xd6;\n - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode from revision 0xca\n up to 0xd6;\n - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xca up to 0xd6;\n - Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from revision 0xca\n up to 0xd6;\n - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xca up to 0xd6.\n* Do not update 06-4e-03 (SKL-U/Y) and 06-5e-03 (SKL-H/S/Xeon E3 v5) to revision\n 0xdc, use 0xd6 by default.\n* Enable 06-2d-07 (SNB-E/EN/EP) caveat by default.\n* Enable 06-55-04 (SKL-SP/X/W) caveat by default.\n* Avoid find being SIGPIPE'd on early \"grep -q\" exit in the dracut script.\n* Re-generate initramfs not only for the currently running kernel,\n but for several recently installed kernels as well.\n* Change the URL in the intel-microcode2ucode.8 to point to the GitHub\n repository since the microcode download section at Intel Download Center\n does not exist anymore.", "published": "2020-06-29T07:37:56", "modified": "2020-06-29T07:45:51", "cvss": {"score": 2.1, "vector": "AV:L/AC:L/Au:N/C:P/I:N/A:N"}, "cvss2": {"acInsufInfo": false, "cvssV2": {"accessComplexity": "LOW", "accessVector": "LOCAL", "authentication": "NONE", "availabilityImpact": "NONE", "baseScore": 2.1, "confidentialityImpact": "PARTIAL", "integrityImpact": "NONE", "vectorString": "AV:L/AC:L/Au:N/C:P/I:N/A:N", "version": "2.0"}, "exploitabilityScore": 3.9, "impactScore": 2.9, "obtainAllPrivilege": false, "obtainOtherPrivilege": false, "obtainUserPrivilege": false, "severity": "LOW", "userInteractionRequired": false}, "cvss3": {"cvssV3": {"attackComplexity": "LOW", "attackVector": "LOCAL", "availabilityImpact": "NONE", "baseScore": 5.5, "baseSeverity": "MEDIUM", "confidentialityImpact": "HIGH", "integrityImpact": "NONE", "privilegesRequired": "LOW", "scope": "UNCHANGED", "userInteraction": "NONE", "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N", "version": "3.1"}, "exploitabilityScore": 1.8, "impactScore": 3.6}, "href": "https://access.redhat.com/errata/RHSA-2020:2758", "reporter": "RedHat", "references": [], "cvelist": ["CVE-2020-0543", "CVE-2020-0548", "CVE-2020-0549"], "immutableFields": [], "lastseen": "2021-10-19T20:37:42", "viewCount": 38, "enchantments": {"dependencies": {"references": [{"type": "almalinux", "idList": ["ALSA-2021:3027"]}, {"type": "amazon", "idList": ["ALAS-2020-1396", "ALAS-2020-1401", "ALAS-2020-1465", "ALAS2-2020-1444"]}, {"type": "archlinux", "idList": ["ASA-202006-10"]}, {"type": "attackerkb", "idList": ["AKB:555EF2E1-269F-4133-8D13-B67EA80F8CC3"]}, {"type": "centos", "idList": ["CESA-2020:2430", "CESA-2020:2432", "CESA-2020:2433", "CESA-2020:2664", "CESA-2021:3028"]}, {"type": "citrix", "idList": ["CTX275165"]}, {"type": "cloudfoundry", "idList": ["CFOUNDRY:0835B914E665F771DA10821B3BDE2D9F", "CFOUNDRY:2B547AA94018245E71F37CB94BA4EEBC", "CFOUNDRY:A5CCCF4486FE273FEA953C57B224799B"]}, {"type": "cve", "idList": ["CVE-2020-0543", "CVE-2020-0548", "CVE-2020-0549"]}, {"type": "debian", "idList": ["DEBIAN:DLA-2241-1:DE3AB", "DEBIAN:DLA-2241-2:3E557", "DEBIAN:DLA-2242-1:573AF", "DEBIAN:DLA-2248-1:806E4", "DEBIAN:DLA-2248-1:D7645", "DEBIAN:DSA-4698-1:66813", "DEBIAN:DSA-4698-1:E1A7D", "DEBIAN:DSA-4699-1:122C4", "DEBIAN:DSA-4699-1:D5D43", "DEBIAN:DSA-4701-1:768E4", "DEBIAN:DSA-4701-1:BB3B8"]}, {"type": "debiancve", "idList": ["DEBIANCVE:CVE-2020-0543", "DEBIANCVE:CVE-2020-0548", "DEBIANCVE:CVE-2020-0549"]}, {"type": "f5", "idList": ["F5:K22206205", "F5:K25920352"]}, {"type": "fedora", "idList": ["FEDORA:055473124314", "FEDORA:1E93431CA0AD", "FEDORA:29E8B30D1A9E", "FEDORA:2AE7F3118C24", "FEDORA:3A4183118C44", "FEDORA:3C5D13124326", "FEDORA:AEC7F30A071F"]}, {"type": "freebsd", "idList": ["FBCBA194-AC7D-11EA-8B5E-B42E99A1B9C3"]}, {"type": "hp", "idList": ["HP:C06655648", "HP:C06657032"]}, {"type": "ibm", "idList": ["11A6D2D3E2F465B16C8FA5A033A65600813397804613FDB0328399EEA7561293", "570AF6CDC4F7E864E6852EBD03923041C13A884B424AC254820AD0EEB73694DF"]}, {"type": "ics", "idList": ["ICSA-20-252-07"]}, {"type": "intel", "idList": ["INTEL:INTEL-SA-00320", "INTEL:INTEL-SA-00329"]}, {"type": "lenovo", "idList": ["LENOVO:PS500303-INTEL-PROCESSORS-SIDE-CHANNEL-DATA-LEAKAGE-VULNERABILITIES-NOSID", "LENOVO:PS500303-NOSID", "LENOVO:PS500327-INTEL-SPECIAL-REGISTER-BUFFER-DATA-SAMPLING-ADVISORY-NOSID", "LENOVO:PS500327-NOSID"]}, {"type": "mageia", "idList": ["MGASA-2020-0298", "MGASA-2020-0333"]}, {"type": "nessus", "idList": ["AL2_ALAS-2020-1444.NASL", "AL2_ALAS-2020-1465.NASL", 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"SUSE_SU-2020-1632-1.NASL", "SUSE_SU-2020-1633-1.NASL", "SUSE_SU-2020-1663-1.NASL", "SUSE_SU-2020-1887-1.NASL", "SUSE_SU-2020-1889-1.NASL", "SUSE_SU-2020-1902-1.NASL", "SUSE_SU-2020-2487-1.NASL", "SUSE_SU-2020-2822-1.NASL", "UBUNTU_USN-4385-1.NASL", "UBUNTU_USN-4385-2.NASL", "UBUNTU_USN-4387-1.NASL", "UBUNTU_USN-4388-1.NASL", "UBUNTU_USN-4389-1.NASL", "UBUNTU_USN-4390-1.NASL", "UBUNTU_USN-4391-1.NASL", "UBUNTU_USN-5617-1.NASL", "VIRTUOZZO_VZA-2020-045.NASL", "XEN_SERVER_XSA-320.NASL"]}, {"type": "openvas", "idList": ["OPENVAS:1361412562310108766", "OPENVAS:1361412562310108812", "OPENVAS:1361412562310704698", "OPENVAS:1361412562310704699", "OPENVAS:1361412562310704701", "OPENVAS:1361412562310844461", "OPENVAS:1361412562310844462", "OPENVAS:1361412562310844463", "OPENVAS:1361412562310844464", "OPENVAS:1361412562310844465", "OPENVAS:1361412562310844466", "OPENVAS:1361412562310844468", "OPENVAS:1361412562310853200", "OPENVAS:1361412562310853206", "OPENVAS:1361412562310853214", "OPENVAS:1361412562310877958", "OPENVAS:1361412562310877968", "OPENVAS:1361412562310877977", "OPENVAS:1361412562310877980", "OPENVAS:1361412562310877999", "OPENVAS:1361412562310878006", "OPENVAS:1361412562310883249", "OPENVAS:1361412562310883250", "OPENVAS:1361412562310883251", "OPENVAS:1361412562310883257", "OPENVAS:1361412562310892241", "OPENVAS:1361412562310892242", "OPENVAS:1361412562310892248"]}, {"type": "oraclelinux", "idList": ["ELSA-2020-2427", "ELSA-2020-2430", "ELSA-2020-2431", "ELSA-2020-2432", "ELSA-2020-2433", "ELSA-2020-2664", "ELSA-2020-2933", "ELSA-2020-3010", "ELSA-2020-4060", "ELSA-2020-5714", "ELSA-2020-5715", "ELSA-2020-5722", "ELSA-2020-5732", "ELSA-2020-5750", "ELSA-2020-5755", "ELSA-2020-5756", "ELSA-2020-5765", "ELSA-2020-5766", "ELSA-2021-3027", "ELSA-2021-3028"]}, {"type": "osv", "idList": ["OSV:DLA-2241-1", "OSV:DLA-2242-1", "OSV:DLA-2248-1", "OSV:DSA-4698-1", "OSV:DSA-4699-1", "OSV:DSA-4701-1"]}, {"type": "photon", "idList": ["PHSA-2020-0108", "PHSA-2020-0256", "PHSA-2020-3.0-0108"]}, {"type": "redhat", "idList": ["RHSA-2020:2427", "RHSA-2020:2428", "RHSA-2020:2429", "RHSA-2020:2430", "RHSA-2020:2431", "RHSA-2020:2432", "RHSA-2020:2433", "RHSA-2020:2664", "RHSA-2020:2665", "RHSA-2020:2667", "RHSA-2020:2677", "RHSA-2020:2679", "RHSA-2020:2680", "RHSA-2020:2706", "RHSA-2020:2707", "RHSA-2020:2757", "RHSA-2020:2770", "RHSA-2020:2771", "RHSA-2020:2777", "RHSA-2020:2831", "RHSA-2020:2832", "RHSA-2020:2842", "RHSA-2020:2851", "RHSA-2020:3019", "RHSA-2021:3027", "RHSA-2021:3028", "RHSA-2021:3029", "RHSA-2021:3176", "RHSA-2021:3255", "RHSA-2021:3317", "RHSA-2021:3322", "RHSA-2021:3323", "RHSA-2021:3364"]}, {"type": "redhatcve", "idList": ["RH:CVE-2020-0543", "RH:CVE-2020-0548", "RH:CVE-2020-0549"]}, {"type": "rocky", "idList": ["RLSA-2021:3027"]}, {"type": "slackware", "idList": ["SSA-2020-163-01"]}, {"type": "suse", "idList": ["OPENSUSE-SU-2020:0791-1", "OPENSUSE-SU-2020:0801-1", "OPENSUSE-SU-2020:0818-1", "OPENSUSE-SU-2020:0965-1", "OPENSUSE-SU-2020:0985-1", "OPENSUSE-SU-2021:0242-1"]}, {"type": "thn", "idList": ["THN:2CDA9FC212AD7424B67DFBA5344BC5BD", "THN:8841D27BD6D8D04E9583E7E0F20898D5"]}, {"type": "threatpost", "idList": ["THREATPOST:7FB07E6C8DF569F394D4B277BFE12285", "THREATPOST:EF0075FFF210E542FF3ECB996DDA02A3"]}, {"type": "ubuntu", "idList": ["LSN-0068-1", "USN-4385-1", "USN-4385-2", "USN-4387-1", "USN-4388-1", "USN-4389-1", "USN-4390-1", "USN-4391-1", "USN-4392-1", "USN-4393-1", "USN-5617-1"]}, {"type": "ubuntucve", "idList": ["UB:CVE-2020-0543", "UB:CVE-2020-0548", "UB:CVE-2020-0549"]}, {"type": "veracode", "idList": ["VERACODE:25645", "VERACODE:25646", "VERACODE:25647"]}, {"type": "virtuozzo", "idList": ["VZA-2020-044", "VZA-2020-045"]}, {"type": "xen", "idList": ["XSA-320"]}]}, "score": {"value": 0.7, "vector": "NONE"}, "backreferences": {"references": [{"type": "almalinux", "idList": ["ALSA-2021:3027"]}, {"type": "amazon", "idList": ["ALAS-2020-1396", "ALAS-2020-1401", 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{"amazon": [{"lastseen": "2023-02-08T17:35:45", "description": "**Issue Overview:**\n\nA new domain bypass transient execution attack known as Special Register Buffer Data Sampling (SRBDS) has been found. This flaw allows data values from special internal registers to be leaked by an attacker able to execute code on any core of the CPU. An unprivileged, local attacker can use this flaw to infer values returned by affected instructions known to be commonly used during cryptographic operations that rely on uniqueness, secrecy, or both. (CVE-2020-0543)\n\nIncomplete cleanup from specific special register read operations in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. (CVE-2020-0548)\n\nCleanup errors in some data cache evictions for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. (CVE-2020-0549)\n\n \n**Affected Packages:** \n\n\nmicrocode_ctl\n\n \n**Issue Correction:** \nRun _yum update microcode_ctl_ to update your system. \n\n\n \n\n\n**New Packages:**\n \n \n i686: \n \u00a0\u00a0\u00a0 microcode_ctl-2.1-47.amzn2.0.7.i686 \n \u00a0\u00a0\u00a0 microcode_ctl-debuginfo-2.1-47.amzn2.0.7.i686 \n \n src: \n \u00a0\u00a0\u00a0 microcode_ctl-2.1-47.amzn2.0.7.src \n \n x86_64: \n \u00a0\u00a0\u00a0 microcode_ctl-2.1-47.amzn2.0.7.x86_64 \n \u00a0\u00a0\u00a0 microcode_ctl-debuginfo-2.1-47.amzn2.0.7.x86_64 \n \n \n\n### Additional References\n\nRed Hat: [CVE-2020-0543](<https://access.redhat.com/security/cve/CVE-2020-0543>), [CVE-2020-0548](<https://access.redhat.com/security/cve/CVE-2020-0548>), [CVE-2020-0549](<https://access.redhat.com/security/cve/CVE-2020-0549>)\n\nMitre: [CVE-2020-0543](<https://vulners.com/cve/CVE-2020-0543>), [CVE-2020-0548](<https://vulners.com/cve/CVE-2020-0548>), [CVE-2020-0549](<https://vulners.com/cve/CVE-2020-0549>)\n", "cvss3": {"exploitabilityScore": 1.8, "cvssV3": {"baseSeverity": "MEDIUM", "confidentialityImpact": "HIGH", "attackComplexity": "LOW", "scope": "UNCHANGED", "attackVector": "LOCAL", "availabilityImpact": "NONE", "integrityImpact": "NONE", "privilegesRequired": "LOW", "baseScore": 5.5, "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N", "version": "3.1", "userInteraction": "NONE"}, "impactScore": 3.6}, "published": "2020-06-26T22:53:00", "type": "amazon", "title": "Medium: microcode_ctl", "bulletinFamily": "unix", "cvss2": {"severity": "LOW", "exploitabilityScore": 3.9, "obtainAllPrivilege": false, "userInteractionRequired": false, "obtainOtherPrivilege": false, "cvssV2": {"accessComplexity": "LOW", "confidentialityImpact": "PARTIAL", "availabilityImpact": "NONE", "integrityImpact": "NONE", "baseScore": 2.1, "vectorString": "AV:L/AC:L/Au:N/C:P/I:N/A:N", "version": "2.0", "accessVector": "LOCAL", "authentication": "NONE"}, "impactScore": 2.9, "acInsufInfo": false, "obtainUserPrivilege": false}, "cvelist": ["CVE-2020-0543", "CVE-2020-0548", "CVE-2020-0549"], "modified": "2020-07-01T00:02:00", "id": "ALAS2-2020-1444", "href": "https://alas.aws.amazon.com/AL2/ALAS-2020-1444.html", "cvss": {"score": 2.1, "vector": "AV:L/AC:L/Au:N/C:P/I:N/A:N"}}, {"lastseen": "2023-02-08T17:10:48", "description": "**Issue Overview:**\n\nA new domain bypass transient execution attack known as Special Register Buffer Data Sampling (SRBDS) has been found. This flaw allows data values from special internal registers to be leaked by an attacker able to execute code on any core of the CPU. An unprivileged, local attacker can use this flaw to infer values returned by affected instructions known to be commonly used during cryptographic operations that rely on uniqueness, secrecy, or both. Incomplete cleanup from specific special register read operations in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. (CVE-2020-0543)\n\nCleanup errors in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. (CVE-2020-0548)\n\nCleanup errors in some data cache evictions for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. (CVE-2020-0549)\n\n \n**Affected Packages:** \n\n\nmicrocode_ctl\n\n \n**Issue Correction:** \nRun _yum update microcode_ctl_ to update your system. \n\n\n \n\n\n**New Packages:**\n \n \n i686: \n \u00a0\u00a0\u00a0 microcode_ctl-2.1-47.39.amzn1.i686 \n \u00a0\u00a0\u00a0 microcode_ctl-debuginfo-2.1-47.39.amzn1.i686 \n \n src: \n \u00a0\u00a0\u00a0 microcode_ctl-2.1-47.39.amzn1.src \n \n x86_64: \n \u00a0\u00a0\u00a0 microcode_ctl-debuginfo-2.1-47.39.amzn1.x86_64 \n \u00a0\u00a0\u00a0 microcode_ctl-2.1-47.39.amzn1.x86_64 \n \n \n\n### Additional References\n\nRed Hat: [CVE-2020-0543](<https://access.redhat.com/security/cve/CVE-2020-0543>), [CVE-2020-0548](<https://access.redhat.com/security/cve/CVE-2020-0548>), [CVE-2020-0549](<https://access.redhat.com/security/cve/CVE-2020-0549>)\n\nMitre: [CVE-2020-0543](<https://vulners.com/cve/CVE-2020-0543>), [CVE-2020-0548](<https://vulners.com/cve/CVE-2020-0548>), [CVE-2020-0549](<https://vulners.com/cve/CVE-2020-0549>)\n", "cvss3": {"exploitabilityScore": 1.8, "cvssV3": {"baseSeverity": "MEDIUM", "confidentialityImpact": "HIGH", "attackComplexity": "LOW", "scope": "UNCHANGED", "attackVector": "LOCAL", "availabilityImpact": "NONE", "integrityImpact": "NONE", "privilegesRequired": "LOW", "baseScore": 5.5, "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:U/C:H/I:N/A:N", "version": "3.1", "userInteraction": "NONE"}, "impactScore": 3.6}, "published": "2020-07-14T01:55:00", "type": "amazon", "title": "Medium: microcode_ctl", "bulletinFamily": "unix", "cvss2": {"severity": "LOW", "exploitabilityScore": 3.9, "obtainAllPrivilege": false, "userInteractionRequired": false, "obtainOtherPrivilege": false, "cvssV2": {"accessComplexity": "LOW", "confidentialityImpact": "PARTIAL", "availabilityImpact": "NONE", "integrityImpact": "NONE", "baseScore": 2.1, "vectorString": "AV:L/AC:L/Au:N/C:P/I:N/A:N", "version": "2.0", "accessVector": "LOCAL", "authentication": "NONE"}, "impactScore": 2.9, "acInsufInfo": false, "obtainUserPrivilege": false}, "cvelist": ["CVE-2020-0543", "CVE-2020-0548", "CVE-2020-0549"], "modified": "2020-07-15T17:28:00", "id": "ALAS-2020-1396", "href": "https://alas.aws.amazon.com/ALAS-2020-1396.html", "cvss": {"score": 2.1, "vector": "AV:L/AC:L/Au:N/C:P/I:N/A:N"}}], "nessus": [{"lastseen": "2023-02-10T14:54:50", "description": "The remote NewStart CGSL host, running version CORE 5.04 / MAIN 5.04, has microcode_ctl packages installed that are affected by multiple vulnerabilities:\n\n - Incomplete cleanup from specific special register read operations in some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. 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Intel CPU microcode update to 20191112, addresses CVE-2017-5715, CVE-2019-0117, CVE-2019-11135, CVE-2019-11139 (#1764049, #1764062, #1764953,\n\n - Addition of 06-a6-00/0x80 (CML-U 6+2 A0) microcode at revision 0xc6 \n\n - Addition of 06-66-03/0x80 (CNL-U D0) microcode at revision 0x2a \n\n - Addition of 06-55-03/0x97 (SKL-SP B1) microcode at revision 0x1000150 \n\n - Addition of 06-7e-05/0x80 (ICL-U/Y D1) microcode at revision 0x46 \n\n - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from revision 0xcc to 0xd4 \n\n - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) microcode from revision 0xcc to 0xd4\n\n - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xb8 to 0xc6 \n\n - Update of 06-8e-0c/0x94 (AML-Y V0) microcode from revision 0xb8 to 0xc6 \n\n - Update of 06-8e-0c/0x94 (CML-U 4+2 V0) microcode from revision 0xb8 to 0xc6 \n\n - Update of 06-8e-0c/0x94 (WHL-U V0) microcode from revision 0xb8 to 0xc6 \n\n - Update of 06-9e-09/0x2a (KBL-G/X H0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-9e-09/0x2a (KBL-H/S/Xeon E3 B0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from revision 0xb4 to 0xc6 \n\n - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from revision 0xb8 to 0xc6.\n\n - Do not update 06-2d-07 (SNB-E/EN/EP) to revision 0x718, use 0x714 by default (#1758382).\n\n - Revert more strict model check code, as it requires request_firmware-based microcode loading mechanism and breaks enabling of microcode with caveats.\n\n - Intel CPU microcode update to 20190918 (#1753540).\n\n - Intel CPU microcode update to 20190618 (#1717238).\n\n - Remove disclaimer, as it is not as important now to justify kmsg/log pollution its contents are partially adopted in README.caveats.\n\n - Intel CPU microcode update to 20190514a (#1711938).\n\n - Intel CPU microcode update to 20190507_Public_DEMO (#1697960).\n\n - Intel CPU microcode update to 20190312 (#1697960).\n\n - Fix disclaimer path in %post script.\n\n - Fix installation path for the disclaimer file.\n\n - Add README.caveats documentation file.\n\n - Use check_caveats from the RHEL 7 package in order to support overrides.\n\n - Disable 06-4f-01 microcode in config (#1622180).\n\n - Intel CPU microcode update to 20180807a (#1614427).\n\n - Add check for minimal microcode version to reload_microcode.\n\n - Intel CPU microcode update to 20180807.\n\n - Resolves: #1614427.\n\n - Intel CPU microcode update to 20180703\n\n - Add infrastructure for handling kernel-version-dependant microcode\n\n - Resolves: #1574593\n\n - Intel CPU microcode update to 20180613.\n\n - Resolves: #1573451\n\n - Update AMD microcode to 2018-05-24\n\n - Resolves: #1584192\n\n - Update AMD microcode\n\n - Resolves: #1574591\n\n - Update disclaimer text\n\n - Resolves: #1574588\n\n - Intel CPU microcode update to 20180425.\n\n - Resolves: #1574588\n\n - Revert Microcode from Intel and AMD for Side Channel attack\n\n - Resolves: #1533941\n\n - Update microcode data file to 20180108 revision.\n\n - Resolves: #1527354\n\n - Update Intel CPU microde for 06-3f-02, 06-4f-01, and 06-55-04\n\n - Add amd microcode_amd_fam17h.bin data file\n\n - Resolves: #1527354\n\n - Update microcode data file to 20170707 revision.\n\n - Resolves: #1465143\n\n - Revert microcode_amd_fam15h.bin to version from amd-ucode-2012-09-10\n\n - Resolves: #1322525\n\n - Update microcode data file to 20161104 revision.\n\n - Add workaround for E5-26xxv4\n\n - Resolves: #1346045\n\n - Update microcode data file to 20160714 revision.\n\n - Resolves: #1346045\n\n - Update amd microcode data file to amd-ucode-2013-11-07\n\n - Resolves: #1322525\n\n - Update microcode data file to 20151106 revision.\n\n - Resolves: #1244968\n\n - Remove bad file permissions on /lib/udev/rules.d/89-microcode.rules\n\n - Resolves: #1201276\n\n - Update microcode data file to 20150121 revision.\n\n - Resolves: #1123992\n\n - Update microcode data file to 20140624 revision.\n\n - Resolves: #1113394\n\n - Update microcode data file to 20140430 revision.\n\n - Resolves: #1036240", "cvss3": {"exploitabilityScore": 2.0, "cvssV3": {"baseSeverity": "MEDIUM", "confidentialityImpact": "HIGH", "attackComplexity": "LOW", "scope": "CHANGED", "attackVector": "LOCAL", "availabilityImpact": "NONE", "integrityImpact": "NONE", "privilegesRequired": "LOW", "baseScore": 6.5, "vectorString": "CVSS:3.1/AV:L/AC:L/PR:L/UI:N/S:C/C:H/I:N/A:N", "version": "3.1", "userInteraction": "NONE"}, "impactScore": 4.0}, "published": "2020-06-23T00:00:00", "type": "nessus", "title": "OracleVM 3.3 / 3.4 : microcode_ctl (OVMSA-2020-0026) (Spectre)", "bulletinFamily": "scanner", "cvss2": {"severity": "LOW", "exploitabilityScore": 3.9, "obtainAllPrivilege": false, "userInteractionRequired": false, "obtainOtherPrivilege": false, "cvssV2": {"accessComplexity": "LOW", "confidentialityImpact": "PARTIAL", "availabilityImpact": "NONE", "integrityImpact": "NONE", "baseScore": 2.1, "vectorString": "AV:L/AC:L/Au:N/C:P/I:N/A:N", "version": "2.0", "accessVector": "LOCAL", "authentication": "NONE"}, "impactScore": 2.9, "acInsufInfo": false, "obtainUserPrivilege": false}, "cvelist": ["CVE-2017-5715", "CVE-2019-0117", "CVE-2019-11135", "CVE-2019-11139", "CVE-2020-0543", "CVE-2020-0548", "CVE-2020-0549"], "modified": "2022-05-16T00:00:00", "cpe": ["p-cpe:/a:oracle:vm:microcode_ctl", "cpe:/o:oracle:vm_server:3.3", "cpe:/o:oracle:vm_server:3.4"], "id": "ORACLEVM_OVMSA-2020-0026.NASL", "href": "https://www.tenable.com/plugins/nessus/137739", "sourceData": "#\n# (C) Tenable Network Security, Inc.\n#\n# The package checks in this plugin were extracted from OracleVM\n# Security Advisory OVMSA-2020-0026.\n#\n\ninclude(\"compat.inc\");\n\nif (description)\n{\n script_id(137739);\n script_version(\"1.5\");\n script_set_attribute(attribute:\"plugin_modification_date\", value:\"2022/05/16\");\n\n script_cve_id(\"CVE-2017-5715\", \"CVE-2019-0117\", \"CVE-2019-11135\", \"CVE-2019-11139\", \"CVE-2020-0543\", \"CVE-2020-0548\", \"CVE-2020-0549\");\n\n script_name(english:\"OracleVM 3.3 / 3.4 : microcode_ctl (OVMSA-2020-0026) (Spectre)\");\n script_summary(english:\"Checks the RPM output for the updated package.\");\n\n script_set_attribute(\n attribute:\"synopsis\",\n value:\"The remote OracleVM host is missing a security update.\"\n );\n script_set_attribute(\n attribute:\"description\",\n value:\n\"The remote OracleVM system is missing necessary patches to address\ncritical security updates :\n\n - update 06-2d-07 to 0x71a\n\n - update 06-55-04 to 0x2006906\n\n - update 06-55-07 to 0x5002f01\n\n - merge Oracle changes for early load via dracut\n\n - enable late load on install for UEK4 kernels marked safe\n (except BDW-79)\n\n - set early_microcode='no' in virtualized guests to avoid\n early load bugs [Orabug: 30618737]\n\n - Update Intel CPU microcode to microcode-20200602\n release, addresses CVE-2020-0543, CVE-2020-0548,\n CVE-2020-0549 (#1795353, #1795357, #1827186) :\n\n - Update of 06-3c-03/0x32 (HSW C0) microcode from revision\n 0x27 up to 0x28 \n\n - Update of 06-3d-04/0xc0 (BDW-U/Y E0/F0) microcode from\n revision 0x2e up to 0x2f \n\n - Update of 06-45-01/0x72 (HSW-U C0/D0) microcode from\n revision 0x25 up to 0x26 \n\n - Update of 06-46-01/0x32 (HSW-H C0) microcode from\n revision 0x1b up to 0x1c \n\n - Update of 06-47-01/0x22 (BDW-H/Xeon E3 E0/G0) microcode\n from revision 0x21 up to 0x22 \n\n - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from\n revision 0xd6 up to 0xdc \n\n - Update of 06-55-03/0x97 (SKX-SP B1) microcode from\n revision 0x1000151 up to 0x1000157 \n\n - Update of 06-55-04/0xb7 (SKX-SP H0/M0/U0, SKX-D M1)\n microcode (in intel-06-55-04/intel-ucode/06-55-04) from\n revision 0x2000065 up to 0x2006906 \n\n - Update of 06-55-06/0xbf (CLX-SP B0) microcode from\n revision 0x400002c up to 0x4002f01 \n\n - Update of 06-55-07/0xbf (CLX-SP B1) microcode from\n revision 0x500002c up to 0x5002f01 \n\n - Update of 06-5e-03/0x36 (SKL-H/S R0/N0) microcode from\n revision 0xd6 up to 0xdc \n\n - Update of 06-8e-09/0x10 (AML-Y22 H0) microcode from\n revision 0xca up to 0xd6 \n\n - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from\n revision 0xca up to 0xd6 \n\n - Update of 06-8e-0a/0xc0 (CFL-U43e D0) microcode from\n revision 0xca up to 0xd6 \n\n - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from\n revision 0xca up to 0xd6 \n\n - Update of 06-8e-0c/0x94 (AML-Y42 V0, CML-Y42 V0, WHL-U\n V0) microcode from revision 0xca up to 0xd6 \n\n - Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0)\n microcode from revision 0xca up to 0xd6 \n\n - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E3 U0) microcode\n from revision 0xca up to 0xd6 \n\n - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from\n revision 0xca up to 0xd6 \n\n - Update of 06-9e-0c/0x22 (CFL-H/S P0) microcode from\n revision 0xca up to 0xd6 \n\n - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from\n revision 0xca up to 0xd6.\n\n - Update Intel CPU microcode to microcode-20200520 release\n (#1839193) :\n\n - Update of 06-2d-06/0x6d (SNB-E/EN/EP C1/M0) microcode\n from revision 0x61f up to 0x621 \n\n - Update of 06-2d-07/0x6d (SNB-E/EN/EP C2/M1) microcode\n from revision 0x718 up to 0x71a \n\n - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from\n revision 0x46 up to 0x78.\n\n - Narrow down SKL-SP/W/X blacklist to exclude\n Server/FPGA/Fabric segment models (#1835555).\n\n - Do not update 06-55-04 (SKL-SP/W/X) to revision\n 0x2000065, use 0x2000064 by default (#1774635).\n\n - Update Intel CPU microcode to microcode-20191115 \nrelease :\n\n - Update of 06-4e-03/0xc0 (SKL-U/Y D0) from revision 0xd4\n up to 0xd6 \n\n - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0) from\n revision 0xd4 up to 0xd6 \n\n - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) from revision\n 0xc6 up to 0xca \n\n - Update of 06-8e-09/0xc0 (KBL-U/Y H0) from revision 0xc6\n up to 0xca \n\n - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) from revision\n 0xc6 up to 0xca \n\n - Update of 06-8e-0b/0xd0 (WHL-U W0) from revision 0xc6 up\n to 0xca \n\n - Update of 06-8e-0c/0x94 (AML-Y V0, CML-U 4+2 V0, WHL-U\n V0) from revision 0xc6 up to 0xca \n\n - Update of 06-9e-09/0x2a (KBL-G/X H0, KBL-H/S/Xeon E3 B0)\n from revision 0xc6 up to 0xca \n\n - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) from\n revision 0xc6 up to 0xca \n\n - Update of 06-9e-0b/0x02 (CFL-S B0) from revision 0xc6 up\n to 0xca \n\n - Update of 06-9e-0c/0x22 (CFL-S/Xeon E P0) from revision\n 0xc6 up to 0xca \n\n - Update of 06-9e-0d/0x22 (CFL-H/S R0) from revision 0xc6\n up to 0xca \n\n - Update of 06-a6-00/0x80 (CML-U 6+2 A0) from revision\n 0xc6 up to 0xca.\n\n - Update Intel CPU microcode to microcode-20191113 \nrelease :\n\n - Update of 06-9e-0c (CFL-H/S P0) microcode from revision\n 0xae up to 0xc6.\n\n - Drop 0001-releasenote-changes-summary-fixes.patch.\n\n - Package the publicy available microcode-20191112 release\n (#1755021) :\n\n - Addition of 06-4d-08/0x1 (AVN B0/C0) microcode at\n revision 0x12d \n\n - Addition of 06-55-06/0xbf (CSL-SP B0) microcode at\n revision 0x400002c \n\n - Addition of 06-7a-08/0x1 (GLK R0) microcode at revision\n 0x16 \n\n - Update of 06-55-03/0x97 (SKL-SP B1) microcode from\n revision 0x1000150 up to 0x1000151 \n\n - Update of 06-55-04/0xb7 (SKL-SP H0/M0/U0, SKL-D M1)\n microcode from revision 0x2000064 up to 0x2000065 \n\n - Update of 06-55-07/0xbf (CSL-SP B1) microcode from\n revision 0x500002b up to 0x500002c \n\n - Update of 06-7a-01/0x1 (GLK B0) microcode from revision\n 0x2e up to 0x32 \n\n - Include 06-9e-0c (CFL-H/S P0) microcode from the\n microcode-20190918 release.\n\n - Correct the releasenote file\n (0001-releasenote-changes-summary-fixes.patch).\n\n - Update README.caveats with the link to the new Knowledge\n Base article.\n\n - Fix the incorrect 'Source2:' tag.\n\n - Intel CPU microcode update to 20191112, addresses\n CVE-2017-5715, CVE-2019-0117, CVE-2019-11135,\n CVE-2019-11139 (#1764049, #1764062, #1764953,\n\n - Addition of 06-a6-00/0x80 (CML-U 6+2 A0) microcode at\n revision 0xc6 \n\n - Addition of 06-66-03/0x80 (CNL-U D0) microcode at\n revision 0x2a \n\n - Addition of 06-55-03/0x97 (SKL-SP B1) microcode at\n revision 0x1000150 \n\n - Addition of 06-7e-05/0x80 (ICL-U/Y D1) microcode at\n revision 0x46 \n\n - Update of 06-4e-03/0xc0 (SKL-U/Y D0) microcode from\n revision 0xcc to 0xd4 \n\n - Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 R0/N0)\n microcode from revision 0xcc to 0xd4\n\n - Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from\n revision 0xb4 to 0xc6 \n\n - Update of 06-8e-09/0xc0 (KBL-U/Y H0) microcode from\n revision 0xb4 to 0xc6 \n\n - Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0) microcode from\n revision 0xb4 to 0xc6 \n\n - Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from\n revision 0xb8 to 0xc6 \n\n - Update of 06-8e-0c/0x94 (AML-Y V0) microcode from\n revision 0xb8 to 0xc6 \n\n - Update of 06-8e-0c/0x94 (CML-U 4+2 V0) microcode from\n revision 0xb8 to 0xc6 \n\n - Update of 06-8e-0c/0x94 (WHL-U V0) microcode from\n revision 0xb8 to 0xc6 \n\n - Update of 06-9e-09/0x2a (KBL-G/X H0) microcode from\n revision 0xb4 to 0xc6 \n\n - Update of 06-9e-09/0x2a (KBL-H/S/Xeon E3 B0) microcode\n from revision 0xb4 to 0xc6 \n\n - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode\n from revision 0xb4 to 0xc6 \n\n - Update of 06-9e-0b/0x02 (CFL-S B0) microcode from\n revision 0xb4 to 0xc6 \n\n - Update of 06-9e-0d/0x22 (CFL-H R0) microcode from\n revision 0xb8 to 0xc6.\n\n - Do not update 06-2d-07 (SNB-E/EN/EP) to revision 0x718,\n use 0x714 by default (#1758382).\n\n - Revert more strict model check code, as it requires\n request_firmware-based microcode loading mechanism and\n breaks enabling of microcode with caveats.\n\n - Intel CPU microcode update to 20190918 (#1753540).\n\n - Intel CPU microcode update to 20190618 (#1717238).\n\n - Remove disclaimer, as it is not as important now to\n justify kmsg/log pollution its contents are partially\n adopted in README.caveats.\n\n - Intel CPU microcode update to 20190514a (#1711938).\n\n - Intel CPU microcode update to 20190507_Public_DEMO\n (#1697960).\n\n - Intel CPU microcode update to 20190312 (#1697960).\n\n - Fix disclaimer path in %post script.\n\n - Fix installation path for the disclaimer file.\n\n - Add README.caveats documentation file.\n\n - Use check_caveats from the RHEL 7 package in order to\n support overrides.\n\n - Disable 06-4f-01 microcode in config (#1622180).\n\n - Intel CPU microcode update to 20180807a (#1614427).\n\n - Add check for minimal microcode version to\n reload_microcode.\n\n - Intel CPU microcode update to 20180807.\n\n - Resolves: #1614427.\n\n - Intel CPU microcode update to 20180703\n\n - Add infrastructure for handling kernel-version-dependant\n microcode\n\n - Resolves: #1574593\n\n - Intel CPU microcode update to 20180613.\n\n - Resolves: #1573451\n\n - Update AMD microcode to 2018-05-24\n\n - Resolves: #1584192\n\n - Update AMD microcode\n\n - Resolves: #1574591\n\n - Update disclaimer text\n\n - Resolves: #1574588\n\n - Intel CPU microcode update to 20180425.\n\n - Resolves: #1574588\n\n - Revert Microcode from Intel and AMD for Side Channel\n attack\n\n - Resolves: #1533941\n\n - Update microcode data file to 20180108 revision.\n\n - Resolves: #1527354\n\n - Update Intel CPU microde for 06-3f-02, 06-4f-01, and\n 06-55-04\n\n - Add amd microcode_amd_fam17h.bin data file\n\n - Resolves: #1527354\n\n - Update microcode data file to 20170707 revision.\n\n - Resolves: #1465143\n\n - Revert microcode_amd_fam15h.bin to version from\n amd-ucode-2012-09-10\n\n - Resolves: #1322525\n\n - Update microcode data file to 20161104 revision.\n\n - Add workaround for E5-26xxv4\n\n - Resolves: #1346045\n\n - Update microcode data file to 20160714 revision.\n\n - Resolves: #1346045\n\n - Update amd microcode data file to amd-ucode-2013-11-07\n\n - Resolves: #1322525\n\n - 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