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nvd416baaa9-dc9f-4396-8d5f-8c081fb06d67NVD:CVE-2024-44949
HistorySep 04, 2024 - 7:15 p.m.

CVE-2024-44949

2024-09-0419:15:30
416baaa9-dc9f-4396-8d5f-8c081fb06d67
web.nvd.nist.gov
4
linux kernel
parisc architecture
dma corruption fix
cache line size
vulnerability fix

EPSS

0

Percentile

16.3%

In the Linux kernel, the following vulnerability has been resolved:

parisc: fix a possible DMA corruption

ARCH_DMA_MINALIGN was defined as 16 - this is too small - it may be
possible that two unrelated 16-byte allocations share a cache line. If
one of these allocations is written using DMA and the other is written
using cached write, the value that was written with DMA may be
corrupted.

This commit changes ARCH_DMA_MINALIGN to be 128 on PA20 and 32 on PA1.1 -
that’s the largest possible cache line size.

As different parisc microarchitectures have different cache line size, we
define arch_slab_minalign(), cache_line_size() and
dma_get_cache_alignment() so that the kernel may tune slab cache
parameters dynamically, based on the detected cache line size.

EPSS

0

Percentile

16.3%