Oracle Linux 10 : microcode_ctl (ELSA-2026-67979)

#%NASL_MIN_LEVEL 80900
##
# (C) Tenable, Inc.
#
# The descriptive text and package checks in this plugin were
# extracted from Oracle Linux Security Advisory ELSA-2026-67979.
##

include('compat.inc');

if (description)
{
  script_id(368022);
  script_version("1.1");
  script_set_attribute(attribute:"plugin_modification_date", value:"2026/10/20");

  script_cve_id("CVE-2025-31936", "CVE-2025-35973");

  script_name(english:"Oracle Linux 10 : microcode_ctl (ELSA-2026-67979)");

  script_set_attribute(attribute:"synopsis", value:
"The remote Oracle Linux host is missing one or more security updates.");
  script_set_attribute(attribute:"description", value:
"The remote Oracle Linux 10 host has a package installed that is affected by multiple vulnerabilities as referenced in
the ELSA-2026-67979 advisory.

    - Security advisories:
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01379.html
      CVE-2025-31936
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01404.html
      CVE-2025-31938
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01423.html
      CVE-2026-20917
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01428.html
      CVE-2025-35973
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01435.html
      CVE-2026-20716
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01441.html
      CVE-2026-20760
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01442.html
      CVE-2026-20713, CVE-2026-20901
      https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01443.html
      CVE-2026-20707
    - Update Intel CPU microcode to microcode-20250512 release, addresses
      CVE-2024-28956, CVE-2025-20103, CVE-2025-20054, CVE-2024-43420,
      CVE-2025-20623, CVE-2024-45332, CVE-2025-24495, CVE-2025-20012
      (RHEL-91227, RHEL-91242, RHEL-91234):
      - Addition of 06-8f-04/0x10 microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2c0003f7;
      - Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2b000639;
      - Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2c0003f7;
      - Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2b000639;
      - Addition of 06-8f-06/0x10 microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2c0003f7;
      - Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2b000639;
      - Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2b000639;
      - Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2c0003f7;
      - Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-06-8f-08/intel-ucode/06-8f-08) at revision 0x2b000639;
      - Addition of 06-ad-01/0x20 (GNR-AP/SP H0) microcode at revision
        0xa0000d1;
      - Addition of 06-ad-01/0x95 (GNR-AP/SP B0) microcode at revision
        0x10003a2;
      - Addition of 06-b5-00/0x80 (ARL-U A1) microcode at revision 0xa;
      - Addition of 06-bd-01/0x80 (LNL B0) microcode at revision 0x11f;
      - Addition of 06-c5-02/0x82 (ARL-H A1) microcode at revision 0x118;
      - Addition of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode (in
        intel-ucode/06-c5-02) at revision 0x118;
      - Addition of 06-c6-04/0x82 microcode (in intel-ucode/06-c5-02) at
        revision 0x118;
      - Addition of 06-ca-02/0x82 microcode (in intel-ucode/06-c5-02) at
        revision 0x118;
      - Addition of 06-c5-02/0x82 (ARL-H A1) microcode (in
        intel-ucode/06-c6-02) at revision 0x118;
      - Addition of 06-c6-02/0x82 (ARL-HX 8P/S B0) microcode at revision
        0x118;
      - Addition of 06-c6-04/0x82 microcode (in intel-ucode/06-c6-02) at
        revision 0x118;
      - Addition of 06-ca-02/0x82 microcode (in intel-ucode/06-c6-02) at
        revision 0x118;
      - Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
        0x5003707 up to 0x5003901;
      - Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002904
        up to 0x7002b01;
      - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003f5
        up to 0xd000404;
      - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x10002c0
        up to 0x10002d0;
      - Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x24 up
        to 0x26;
      - Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xc6
        up to 0xca;
      - Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode from revision
        0xb8 up to 0xbc;
      - Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x38 up
        to 0x3c;
      - Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x52 up
        to 0x56;
      - Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
        microcode from revision 0xfc up to 0x100;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
        0x2b000620 up to 0x2b000639;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000620 up to 0x2b000639;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
        0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-97-02) from revision 0x38 up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
        from revision 0x38 up to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
        from revision 0x38 up to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-02) from
        revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-02) from
        revision 0x38 up to 0x3a;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-97-05) from revision 0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x38
        up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
        from revision 0x38 up to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
        from revision 0x38 up to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-97-05) from
        revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-97-05) from
        revision 0x38 up to 0x3a;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
        0x436 up to 0x437;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
        intel-ucode/06-9a-03) from revision 0x436 up to 0x437;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
        intel-ucode/06-9a-04) from revision 0x436 up to 0x437;
      - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x9 up
        to 0xa;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x436
        up to 0x437;
      - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision
        0x102 up to 0x104;
      - Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xfc up
        to 0x100;
      - Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xfc
        up to 0x100;
      - Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xfc
        up to 0x100;
      - Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xfe
        up to 0x102;
      - Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
        0xfc up to 0x100;
      - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x63 up
        to 0x64;
      - Update of 06-aa-04/0xe6 (MTL-H/U C0) microcode from revision 0x20
        up to 0x24;
      - Update of 06-af-03/0x01 (SRF-SP C0) microcode from revision 0x3000330
        up to 0x3000341;
      - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x12c up
        to 0x12f;
      - Update of 06-b7-04/0x32 microcode (in intel-ucode/06-b7-01) from
        revision 0x12c up to 0x12f;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
        0x4124 up to 0x4128;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
        intel-ucode/06-ba-02) from revision 0x4124 up to 0x4128;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from
        revision 0x4124 up to 0x4128;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
        intel-ucode/06-ba-03) from revision 0x4124 up to 0x4128;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4124
        up to 0x4128;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from
        revision 0x4124 up to 0x4128;
      - Update of 06-be-00/0x19 (ADL-N A0) microcode from revision 0x1c up
        to 0x1d;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-bf-02) from revision 0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-bf-02) from revision 0x38 up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x38 up
        to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
        from revision 0x38 up to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-02) from
        revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-02) from
        revision 0x38 up to 0x3a;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-bf-05) from revision 0x38 up to 0x3a;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-bf-05) from revision 0x38 up to 0x3a;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
        from revision 0x38 up to 0x3a;
      - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x38 up
        to 0x3a;
      - Update of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-05) from
        revision 0x38 up to 0x3a;
      - Update of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-05) from
        revision 0x38 up to 0x3a;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode from revision 0x21000291
        up to 0x210002a9;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode (in
        intel-ucode/06-cf-01) from revision 0x21000291 up to 0x210002a9;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in
        intel-ucode/06-cf-02) from revision 0x21000291 up to 0x210002a9;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x21000291
        up to 0x210002a9;
    - Update Intel CPU microcode to microcode-20250211 release, addresses
      CVE-2023-34440, CVE-2023-43758, CVE-2024-24582, CVE-2024-28047,
      CVE-2024-28127, CVE-2024-29214, CVE-2024-31068, CVE-2024-31157,
      CVE-2024-37020, CVE-2024-39279, CVE-2024-39355, CVE-2024-36293 (RHEL-79184,
      RHEL-79185, RHEL-79188, RHEL-79189, RHEL-79191, RHEL-79193, RHEL-79203):
      - Addition of 06-bf-06/0x07 microcode (in intel-ucode/06-97-02) at
        revision 0x38;
      - Addition of 06-bf-07/0x07 microcode (in intel-ucode/06-97-02) at
        revision 0x38;
      - Addition of 06-bf-06/0x07 microcode (in intel-ucode/06-97-05) at
        revision 0x38;
      - Addition of 06-bf-07/0x07 microcode (in intel-ucode/06-97-05) at
        revision 0x38;
      - Addition of 06-af-03/0x01 (SRF-SP C0) microcode at revision 0x3000330;
      - Addition of 06-b7-04/0x32 microcode (in intel-ucode/06-b7-01) at
        revision 0x12c;
      - Addition of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-02) at
        revision 0x38;
      - Addition of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-02) at
        revision 0x38;
      - Addition of 06-bf-06/0x07 microcode (in intel-ucode/06-bf-05) at
        revision 0x38;
      - Addition of 06-bf-07/0x07 microcode (in intel-ucode/06-bf-05) at
        revision 0x38;
      - Removal of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-05) at revision 0x2b000603;
      - Removal of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at
        revision 0x2c000390;
      - Removal of 06-8f-05/0x87 (SPR-SP E2) microcode at revision 0x2b000603;
      - Removal of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision
        0x2c000390;
      - Removal of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-05) at revision 0x2b000603;
      - Removal of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at
        revision 0x2c000390;
      - Removal of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-ucode/06-8f-05) at revision 0x2b000603;
      - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-05) at revision 0x2b000603;
      - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
        intel-ucode/06-8f-05) at revision 0x2c000390;
      - Removal of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-06) at revision 0x2b000603;
      - Removal of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at
        revision 0x2c000390;
      - Removal of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-06) at revision 0x2b000603;
      - Removal of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
        intel-ucode/06-8f-06) at revision 0x2c000390;
      - Removal of 06-8f-06/0x87 (SPR-SP E3) microcode at revision 0x2b000603;
      - Removal of 06-8f-06/0x10 microcode at revision 0x2c000390;
      - Removal of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-ucode/06-8f-06) at revision 0x2b000603;
      - Removal of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-06) at revision 0x2b000603;
      - Removal of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
        intel-ucode/06-8f-06) at revision 0x2c000390;
      - Removal of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
        intel-ucode/06-ba-08) at revision 0x4123;
      - Removal of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
        intel-ucode/06-ba-08) at revision 0x4123;
      - Removal of 06-ba-08/0xe0 microcode at revision 0x4123;
      - Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0003e7
        up to 0xd0003f5;
      - Update of 06-6c-01/0x10 (ICL-D B0) microcode from revision 0x10002b0
        up to 0x10002c0;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
        0x2b000603 up to 0x2b000620;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) from
        revision 0x2c000390 up to 0x2c0003e0;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
        intel-ucode/06-8f-08) from revision 0x2c000390 up to 0x2c0003e0;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) from
        revision 0x2c000390 up to 0x2c0003e0;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b000603 up to 0x2b000620;
      - Update of 06-8f-08/0x10 (SPR-HBM B3) microcode from revision
        0x2c000390 up to 0x2c0003e0;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
        0x2b000603 up to 0x2b000620;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
        0x37 up to 0x38;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-97-02) from revision 0x37 up to 0x38;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
        from revision 0x37 up to 0x38;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
        from revision 0x37 up to 0x38;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-97-05) from revision 0x37 up to 0x38;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x37
        up to 0x38;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
        from revision 0x37 up to 0x38;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
        from revision 0x37 up to 0x38;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
        0x435 up to 0x436;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
        intel-ucode/06-9a-03) from revision 0x435 up to 0x436;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
        intel-ucode/06-9a-04) from revision 0x435 up to 0x436;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x435
        up to 0x436;
      - Update of 06-9a-04/0x40 (AZB A0) microcode from revision 0x7 up
        to 0x9;
      - Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision
        0xf8 up to 0xfa;
      - Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision
        0x100 up to 0x102;
      - Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x62 up
        to 0x63;
      - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x12b up
        to 0x12c;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
        0x4123 up to 0x4124;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
        intel-ucode/06-ba-02) from revision 0x4123 up to 0x4124;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from
        revision 0x4123 up to 0x4124;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
        intel-ucode/06-ba-03) from revision 0x4123 up to 0x4124;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4123
        up to 0x4124;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from
        revision 0x4123 up to 0x4124;
      - Update of 06-be-00/0x19 (ADL-N A0) microcode from revision 0x1a up
        to 0x1c;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-bf-02) from revision 0x37 up to 0x38;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-bf-02) from revision 0x37 up to 0x38;
      - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x37 up
        to 0x38;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
        from revision 0x37 up to 0x38;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-bf-05) from revision 0x37 up to 0x38;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-bf-05) from revision 0x37 up to 0x38;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
        from revision 0x37 up to 0x38;
      - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x37 up
        to 0x38;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode from revision 0x21000283
        up to 0x21000291;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode (in
        intel-ucode/06-cf-01) from revision 0x21000283 up to 0x21000291;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in
        intel-ucode/06-cf-02) from revision 0x21000283 up to 0x21000291;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x21000283
        up to 0x21000291.
    - Update Intel CPU microcode to microcode-20241112 release, addresses
      CVE-2024-21820, CVE-2024-21853, CVE-2024-23918, CVE-2024-23984 (RHEL-67335):
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode from revision 0x2b0005c0
        up to 0x2b000603;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-05) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode from revision 0x2b0005c0
        up to 0x2b000603;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-06) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode from revision
        0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
        intel-ucode/06-8f-07) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-05/0x87 (SPR-SP E2) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-06/0x87 (SPR-SP E3) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
        intel-ucode/06-8f-08) from revision 0x2b0005c0 up to 0x2b000603;
      - Update of 06-8f-08/0x87 (SPR-SP E5/S3) microcode from revision
        0x2b0005c0 up to 0x2b000603;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
        0x36 up to 0x37;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-97-02) from revision 0x36 up to 0x37;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
        from revision 0x36 up to 0x37;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
        from revision 0x36 up to 0x37;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-97-05) from revision 0x36 up to 0x37;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x36
        up to 0x37;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
        from revision 0x36 up to 0x37;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
        from revision 0x36 up to 0x37;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
        0x434 up to 0x435;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
        intel-ucode/06-9a-03) from revision 0x434 up to 0x435;
      - Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
        intel-ucode/06-9a-04) from revision 0x434 up to 0x435;
      - Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x434
        up to 0x435;
      - Update of 06-aa-04/0xe6 (MTL-H/U C0) microcode from revision 0x1f
        up to 0x20;
      - Update of 06-b7-01/0x32 (RPL-S B0) microcode from revision 0x129 up
        to 0x12b;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode from revision
        0x4122 up to 0x4123;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
        intel-ucode/06-ba-02) from revision 0x4122 up to 0x4123;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-02) from
        revision 0x4122 up to 0x4123;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
        intel-ucode/06-ba-03) from revision 0x4122 up to 0x4123;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode from revision 0x4122
        up to 0x4123;
      - Update of 06-ba-08/0xe0 microcode (in intel-ucode/06-ba-03) from
        revision 0x4122 up to 0x4123;
      - Update of 06-ba-02/0xe0 (RPL-H 6+8/P 6+8 J0) microcode (in
        intel-ucode/06-ba-08) from revision 0x4122 up to 0x4123;
      - Update of 06-ba-03/0xe0 (RPL-U 2+8 Q0) microcode (in
        intel-ucode/06-ba-08) from revision 0x4122 up to 0x4123;
      - Update of 06-ba-08/0xe0 microcode from revision 0x4122 up to 0x4123;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-bf-02) from revision 0x36 up to 0x37;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-bf-02) from revision 0x36 up to 0x37;
      - Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x36 up
        to 0x37;
      - Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
        from revision 0x36 up to 0x37;
      - Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
        intel-ucode/06-bf-05) from revision 0x36 up to 0x37;
      - Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
        intel-ucode/06-bf-05) from revision 0x36 up to 0x37;
      - Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
        from revision 0x36 up to 0x37;
      - Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x36 up
        to 0x37;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode from revision 0x21000230
        up to 0x21000283;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode (in
        intel-ucode/06-cf-01) from revision 0x21000230 up to 0x21000283;
      - Update of 06-cf-01/0x87 (EMR-SP A0) microcode (in
        intel-ucode/06-cf-02) from revision 0x21000230 up to 0x21000283;
      - Update of 06-cf-02/0x87 (EMR-SP A1) microcode from revision 0x21000230
        up to 0x21000283.

Tenable has extracted the preceding description block directly from the Oracle Linux security advisory.

Note that Nessus has not tested for these issues but has instead relied only on the application's self-reported version
number.");
  script_set_attribute(attribute:"see_also", value:"https://linux.oracle.com/errata/ELSA-2026-67979.html");
  script_set_attribute(attribute:"solution", value:
"Update the affected microcode_ctl package.");
  script_set_cvss_base_vector("CVSS2#AV:L/AC:H/Au:M/C:C/I:C/A:N");
  script_set_cvss_temporal_vector("CVSS2#E:U/RL:OF/RC:C");
  script_set_cvss3_base_vector("CVSS:3.0/AV:L/AC:H/PR:H/UI:N/S:U/C:H/I:H/A:N");
  script_set_cvss3_temporal_vector("CVSS:3.0/E:U/RL:O/RC:C");
  script_set_attribute(attribute:"cvss4_vector", value:"CVSS:4.0/AV:L/AC:H/AT:P/PR:H/UI:N/VC:H/VI:H/VA:N/SC:N/SI:N/SA:N");
  script_set_attribute(attribute:"cvss4_threat_vector", value:"CVSS:4.0/E:U");
  script_set_attribute(attribute:"cvss_score_source", value:"CVE-2025-31936");

  script_set_attribute(attribute:"exploitability_ease", value:"No known exploits are available");
  script_set_attribute(attribute:"exploit_available", value:"false");

  script_set_attribute(attribute:"vuln_publication_date", value:"2026/08/11");
  script_set_attribute(attribute:"patch_publication_date", value:"2026/10/13");
  script_set_attribute(attribute:"plugin_publication_date", value:"2026/10/20");

  script_set_attribute(attribute:"plugin_type", value:"local");
  script_set_attribute(attribute:"cpe", value:"cpe:/o:oracle:linux:10");
  script_set_attribute(attribute:"cpe", value:"cpe:/o:oracle:linux:10:2:baseos_patch");
  script_set_attribute(attribute:"cpe", value:"p-cpe:/a:oracle:linux:microcode_ctl");
  script_set_attribute(attribute:"generated_plugin", value:"current");
  script_end_attributes();

  script_category(ACT_GATHER_INFO);
  script_family(english:"Oracle Linux Local Security Checks");

  script_copyright(english:"This script is Copyright (C) 2026 and is owned by Tenable, Inc. or an Affiliate thereof.");

  script_dependencies("ssh_get_info2.nasl");
  script_require_keys("Host/OracleLinux", "Host/RedHat/release", "Host/RedHat/rpm-list", "Host/local_checks_enabled");

  exit(0);
}


include('rpm2.inc');

if (!get_kb_item('Host/local_checks_enabled')) audit(AUDIT_LOCAL_CHECKS_NOT_ENABLED);
var os_product = get_kb_item('installed_os/local/SSH/0/product');
if (isnull(os_product) || !pregmatch(pattern: "Oracle (?:Linux Server|Enterprise Linux)", string:os_product)) audit(AUDIT_OS_NOT, 'Oracle Linux');
var os_version = get_kb_item('installed_os/local/SSH/0/version');
if (isnull(os_version)) audit(AUDIT_UNKNOWN_APP_VER, 'Oracle Linux');
if (! preg(pattern:"^10([^0-9]|$)", string:os_version)) audit(AUDIT_OS_NOT, 'Oracle Linux 10.x', 'Oracle Linux ' + os_version);

if (!get_kb_item('Host/RedHat/rpm-list')) audit(AUDIT_PACKAGE_LIST_MISSING);

var cpu = get_kb_item('Host/cpu');
if (isnull(cpu)) audit(AUDIT_UNKNOWN_ARCH);
if ('x86_64' >!< cpu && cpu !~ "^i[3-6]86$" && 'aarch64' >!< cpu) audit(AUDIT_LOCAL_CHECKS_NOT_IMPLEMENTED, 'Oracle Linux', cpu);
if ('x86_64' >!< cpu) audit(AUDIT_ARCH_NOT, 'x86_64', cpu);

var constraints = [
  {
    'release': '10',
    'pkgs': [
      {'reference':'microcode_ctl-20260812-1.0.2.el10_2', 'cpu':'x86_64', 'rpm_spec_vers_cmp':TRUE, 'epoch':'4'}
    ]
  }
];

var os_release = get_one_kb_item('installed_os/local/SSH/0/release');
var os_sp = get_one_kb_item('Host/*/minor_release');

var flag = 0;
var reference;
var sp;
var _cpu;
var el_string;
var rpm_spec_vers_cmp;
var epoch;
var allowmaj;
var exists_check;
var cves;
foreach var constraint ( constraints ) {
  # Check that the target release is equal to the affected release
  if (!empty_or_null(constraint['release'])){
    if (constraint['release'] != os_release) continue;
  }
  if (!empty_or_null(constraint['sp'])){
    if (constraint['sp'] != os_sp) continue;
  }
  foreach var pkg ( constraint['pkgs'] ) {
    reference = NULL;
    sp = NULL;
    _cpu = NULL;
    el_string = NULL;
    rpm_spec_vers_cmp = NULL;
    epoch = NULL;
    allowmaj = NULL;
    exists_check = NULL;
    cves = NULL;
    if (!empty_or_null(pkg['reference'])) reference = pkg['reference'];
    if (!empty_or_null(pkg['sp'])) sp = pkg['sp'];
    if (!empty_or_null(pkg['cpu'])) _cpu = pkg['cpu'];
    if (!empty_or_null(pkg['el_string'])) el_string = pkg['el_string'];
    if (!empty_or_null(pkg['rpm_spec_vers_cmp'])) rpm_spec_vers_cmp = pkg['rpm_spec_vers_cmp'];
    if (!empty_or_null(pkg['epoch'])) epoch = pkg['epoch'];
    if (!empty_or_null(pkg['allowmaj'])) allowmaj = pkg['allowmaj'];
    if (!empty_or_null(pkg['exists_check'])) exists_check = pkg['exists_check'];
    if (!empty_or_null(pkg['cves'])) cves = pkg['cves'];
    if (reference &&
        ## (no known rpm to check OR known rpm_exists)
        (!exists_check || rpm_exists(rpm:exists_check)) &&
        rpm_check(sp:sp, cpu:_cpu, reference:reference, epoch:epoch, el_string:el_string, rpm_spec_vers_cmp:rpm_spec_vers_cmp, allowmaj:allowmaj, cves:cves)) flag++;
  }
}

if (flag)
{
  security_report_v4(
      port       : 0,
      severity   : SECURITY_WARNING,
      extra      : rpm_report_get()
  );
  exit(0);
}
else
{
  var tested = pkg_tests_get();
  if (tested) audit(AUDIT_PACKAGE_NOT_AFFECTED, tested);
  else audit(AUDIT_PACKAGE_NOT_INSTALLED, 'microcode_ctl');
}