6.8 Medium
CVSS3
Attack Vector
PHYSICAL
Attack Complexity
LOW
Privileges Required
NONE
User Interaction
NONE
Scope
UNCHANGED
Confidentiality Impact
HIGH
Integrity Impact
HIGH
Availability Impact
HIGH
CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
4.6 Medium
CVSS2
Access Vector
LOCAL
Access Complexity
LOW
Authentication
NONE
Confidentiality Impact
PARTIAL
Integrity Impact
PARTIAL
Availability Impact
PARTIAL
AV:L/AC:L/Au:N/C:P/I:P/A:P
Hardware allows activation of test or debug logic at runtime for some Intelยฎ processors which may allow an unauthenticated user to potentially enable escalation of privilege via physical access.
OS | Version | Architecture | Package | Version | Filename |
---|---|---|---|---|---|
Debian | 12 | all | intel-microcode | <=ย 3.20210608.2 | intel-microcode_3.20210608.2_all.deb |
Debian | 11 | all | intel-microcode | <=ย 3.20210608.2 | intel-microcode_3.20210608.2_all.deb |
Debian | 10 | all | intel-microcode | <=ย 3.20210608.2~deb10u1 | intel-microcode_3.20210608.2~deb10u1_all.deb |
Debian | 999 | all | intel-microcode | <=ย 3.20210608.2 | intel-microcode_3.20210608.2_all.deb |
Debian | 9 | all | intel-microcode | <=ย 3.20200616.1~deb9u1 | intel-microcode_3.20200616.1~deb9u1_all.deb |
6.8 Medium
CVSS3
Attack Vector
PHYSICAL
Attack Complexity
LOW
Privileges Required
NONE
User Interaction
NONE
Scope
UNCHANGED
Confidentiality Impact
HIGH
Integrity Impact
HIGH
Availability Impact
HIGH
CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:H/A:H
4.6 Medium
CVSS2
Access Vector
LOCAL
Access Complexity
LOW
Authentication
NONE
Confidentiality Impact
PARTIAL
Integrity Impact
PARTIAL
Availability Impact
PARTIAL
AV:L/AC:L/Au:N/C:P/I:P/A:P