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cvelistMicrochipCVELIST:CVE-2024-30212
HistoryMay 28, 2024 - 4:07 p.m.

CVE-2024-30212 Microchip Harmony 3 Core library allows read and write access to RAM via a SCSI READ or WRITE command

2024-05-2816:07:52
CWE-190
Microchip
www.cve.org
microchip harmony 3
ram access
scsi read
usb
lba
ram exposure
memory area
overwrite

7 High

CVSS4

Attack Vector

PHYSICAL

Attack Complexity

LOW

Privileges Required

NONE

User Interaction

NONE

CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/SC:N/VI:H/SI:N/VA:H/SA:N

6.7 Medium

AI Score

Confidence

High

0.0004 Low

EPSS

Percentile

15.7%

If a SCSI READ(10) command is initiated via USB using the largest LBA
(0xFFFFFFFF) with it’s default block size of 512 and a count of 1,

the first 512 byte of the 0x80000000 memory area is returned to the
user. If the block count is increased, the full RAM can be exposed.

The same method works to write to this memory area. If RAM contains
pointers, those can be - depending on the application - overwritten to

return data from any other offset including Progam and Boot Flash.

CNA Affected

[
  {
    "defaultStatus": "unaffected",
    "modules": [
      "memory"
    ],
    "packageName": "core",
    "product": "MPLAB® Harmony 3 Core Module",
    "programFiles": [
      "drv_memory.c.ftl"
    ],
    "programRoutines": [
      {
        "name": "DRV_MEMORY_SetupXfer"
      }
    ],
    "repo": "https://github.com/Microchip-MPLAB-Harmony",
    "vendor": "Microchip",
    "versions": [
      {
        "lessThan": "3.13.4",
        "status": "affected",
        "version": "3.0.0",
        "versionType": "semver"
      }
    ]
  }
]

7 High

CVSS4

Attack Vector

PHYSICAL

Attack Complexity

LOW

Privileges Required

NONE

User Interaction

NONE

CVSS:4.0/AV:P/AC:L/AT:N/PR:N/UI:N/VC:H/SC:N/VI:H/SI:N/VA:H/SA:N

6.7 Medium

AI Score

Confidence

High

0.0004 Low

EPSS

Percentile

15.7%

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