Transient Execution of Non-canonical Accesses

Bulletin ID: AMD-SB-1010 **Potential Impact:**Data Leakage **Severity:**Medium

Summary

AMD reviewed “Transient Execution of Non-Canonical Accesses“ submitted by a researcher demonstrating that AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits.

CVE Details

CVE-2020-12965
When combined with specific software sequences, AMD CPUs may transiently execute non-canonical loads and store using only the lower 48 address bits potentially resulting in data leakage.

Affected Products

AMD CPUs

Mitigation

AMD recommends that SW vendors analyze their code for any potential vulnerabilities related to this type of transient execution. Potential vulnerabilities can be addressed by inserting an LFENCE or using existing speculation mitigation techniques as described in [2].